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2.5 Application Instructions
2.5.19 Multiple CPU high speed transmission dedicated instructions
2.5.19
Multiple CPU high speed transmission dedicated instructions
Table 2.36 Multiple CPU high speed transmission dedicated instructions
Category
Instruction name
Argument
Processing details
Executing
condition
Page
Data read from
other CPU
shared memory
FROM
n1, n2, n3,
• Reads devices from the CPU shared
memory of another station CPU module
to the host station.
DFRO
, n1, n2, n3
• Reads devices from the CPU shared
memory of another station CPU module to
the host station in units of 32-bit data.
Auto refresh of
CPU shared
memory
COM
−
• Performs the auto refresh of the
intelligent function module, and the auto
refresh of general data and CPU shared
memory.
Category
Instruction name
Argument
Processing details
Executing
condition
Page
Device data write
to other CPU
D_DDWR
n1, , , ,
• Writes data stored in the device and
the following devices in the host CPU at
the time of multiple CPU system
configuration, to the device
and the
following devices specified in the other
CPU (n1) for the number of points
specified for +1.
DP_DDWR
n1, , , ,
Device data read
from other CPU
D_DDRD
n1, , , ,
• Stores data read from the device and
the following devices specified in the
other CPU (n1) for the number of points
specified for +1, to the device
and
the following devices specified in the
host CPU at the time of multiple CPU
system configuration.
DP_DDRD
n1, , , ,
d
s
s
1
s
2
d
1
d
2
s
2
d
1
s
1
s
1
s
2
d
1
d
2
s
1
s
2
d
1
d
2
s
2
s
1
d
1
s
1
s
2
d
1
d
2
Содержание MELSEC Q Series
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