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RTE-V821-PC

User's Manual

Midas lab

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Содержание RTE-V821-PC

Страница 1: ...RTE V821 PC User s Manual Midas lab...

Страница 2: ...USER S MANUAL 1 REVISION HISTORY Date of enforcement Revision Page Description August 11 1995 1 0 First issue December 25 1995 1 1 11 12 Correction of error related to descriptions about SW2 1 2 and 3...

Страница 3: ...AND USE 11 4 1 BOARD SETTING 11 4 2 INSTALLATION ON THE ISA BUS 12 4 3 STANDALONE USE OF THE BOARD 12 5 HARDWARE REFERENCES 13 5 1 MEMORY MAP 13 5 2 I O MAP 14 5 2 1 Port Unit PORT 14 5 2 2 Wait Contr...

Страница 4: ...ti MONITOR 22 9 1 MONITOR WORK RAM 22 9 2 INTERRUPTS 22 9 3 _INIT_SP SETTING 22 9 4 REMOTE CONNECTION 22 10 RTE COMMANDS 23 10 1 HELP 23 10 2 INIT 23 10 3 VER 23 10 4 INB INH AND INW 23 10 5 OUTB OUTH...

Страница 5: ...its using local bus connectors provided on the evaluation board 1 1 NUMERIC NOTATION This manual represents numbers according to the notation described in the following table Hexadecimal and binary nu...

Страница 6: ...x 16 bits SRAM 128 Kbytes 64K x 16 bits DRAM 4 8 or 16 Mbytes standard of 4 Mbytes installed in a 72 pin SIMM socket RS 232C port 9 pin D SUB connector Communication function supported using the ISA b...

Страница 7: ...ing connector Type A 5 5 mm in diameter Polarity GND GND 5V 5V Caution When attaching an external power supply to the board be careful about its connector polarity When inserting the board into the IS...

Страница 8: ...put output Function RESET Input When a low level is supplied to this test pin the CPU is reset A reset request signal from the ROM in circuit debugger is connected to the test pin The test pin is pull...

Страница 9: ...PU and pulled up with 47 k 19 DACK1 P04 Connected directly to the CPU and pulled up with 47 k 20 NC Not connected JSUBPORT Connector Signals 3 8 SERIAL CONNECTOR JSIO JSIO is a connector for the RS 23...

Страница 10: ...is pulled down with 47 k in the RTE V821 PC so the PLL mode is usually selected In this case the frequency of the oscillator or crystal connected to the OSC1 socket is one fifth the system clock frequ...

Страница 11: ...outine 3 11 DRAM SIMM SOCKETS The RTE V821 PC has DRAM SIMM socket used to install 4 Mbytes standard of SIMM Each socket can hold a 72 pin 4 8 or 16 Mbyte SIMM known as a module for DOS V machines so...

Страница 12: ...IO JSUBPORT SRAM SW 1 ROM PLD PLD NMI RD_WRALL RESET GND PIO OSC1 Switches on the RTE V821 PC Board SW1 is a switch for selecting the I O address of the ISA bus Switch contacts 1 to 8 correspond to IS...

Страница 13: ...occurs during installation of a device driver it is likely that the set I O address is the same as one already in use Reconfirm the I O address of the board by referring to the applicable manual of th...

Страница 14: ...FFB0 0000 to FFB0 0FFF Image of FFFE 0000 to FFFF FFFF Not used Not used Not used CS1 space CS2 space CS3 space DRAM Reserved SRAM EXT BUS SYSTEM I O ROM See the figure at the right See the figure at...

Страница 15: ...ontains the Multi monitor 5 2 I O MAP The I O space in the V821 CPU is not used in the RTE V821 PC The I O registers used for control purposes are allocated in the memory mapped SYSTEM I O space This...

Страница 16: ...are used RFC C000 002Ah 1000 1000B DRAM Control Unit Setting 5 2 4 ROM Controller ROMC Page ROM cannot be used in the RTE V821 PC So no ROM controller is used 5 2 5 DMA Controller DMAC The DMA control...

Страница 17: ...21 PC The CPU pins related to the bus arbitration unit HLDRQ and HLDAK are not used in the RTE V821 PC either 5 2 10 Clock Generator CG Clock pulses are generated from an oscillator or crystal mounted...

Страница 18: ...MR2 MR1 MR2 FFB0 0402h SR CSR FFB0 0404h Reserved CR FFB0 0406h RHR THR FFB0 0408h Reserved ACR FFB0 040Ah ISR IMR FFB0 040Ch CTU CTUR FFB0 040Eh CTL CTLR SCC2691 Register Map The general purpose outp...

Страница 19: ...ed to clear TOVERF in bit 5 of port 2 It should be initialized to 1 and usually kept to be 1 When TOVERF is to be cleared the bit should be rest to 0 then set back to 1 NMIMASK This bit is used to mas...

Страница 20: ...tput Address bus signal which is originally the CPU address signal received at a buffer BHE Output Byte high enable signal which is originally the CPU UBE signal received at a buffer D 0 15 Input outp...

Страница 21: ...e 0 T2 RD address hold up time 0 T3 RD cycle time 50 T4 RD cycle interval 20 T5 RD data setup time 15 T6 RD data hold time 0 T7 WR READY WAIT setup time 0 T8 WR READY setup time 0 T9 WR READY hold tim...

Страница 22: ...the SCC2691 becomes active an NMI occurs see Section 6 1 1 NMI request from a TP A reset occurs when the NMI test pin receives an input See Section 3 6 for details Request from the ISA bus An NMI is...

Страница 23: ...When running on the Multi monitor user programs cannot use interrupts at present When the internal I O is used interrupts cannot be used 9 3 _INIT_SP SETTING _INIT_SP stack pointer initial value is s...

Страница 24: ...34H 1234 10 1 HELP Format HELP command name Displays a list of RTE commands and their formats A question mark can also be used in place of the character string HELP If no command name is specified in...

Страница 25: ...command PMC0 PM0 P0 BCTC PWC0 PWC1 PWC2 DRC RFC PRC DSA0H DSA0L DDA0H DDA0L DSA1H DSA1L DDA1H DDA1L DBC0 DBC1 DCHC0 DCHC1 TUM0 TMC0 TMC1 TOC0 TOVS ASIM ASIS RXB RXBL TXS TXSL CSIM SIO BRG BPRM IGP IC...

Страница 26: ...ardware control 5 2 2 RESET Used as a reset input 8 1 NMI Used an NMI input 8 2 HLDRQ HLDAK Not used Pulled up with 47 k 5 2 9 DREQ0 P01 DACK0 P02 DREQ1 P03 DACK1 P04 Not used Connected to JSUBPORT Pu...

Страница 27: ...RTE V821 PC USER S MANUAL 26 Memo RTE V821 PC User s Manual M471MNL02 First issue Rev1 0 on August 11 1995 Revision Rev1 1 on December 25 1995 Midas lab...

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