Microsemi LX7720, Руководство пользователя

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Complete Schematics
June 2020 LX7720 Daughter Board rev 2.1 21
© 2020 Microsemi Corporation
VDD_3P3V
FP
G
A
I
O
C
O
NNE
C
T
O
R
VCC
3.3V
R15 1K/1%/0805 ADC3_P
ADC3_N
ADC1_P
ADC1_N
ADC2_P
ADC2_N
BLI1
BLI2
BLI3
BLI4
BLI5
BLI6
R8
10
K/
1%
/0
80
5
VREF_IN
1 2
J5
HDR_2_100MIL
1 2
J6
HDR_2_100MIL
C29 10uF/50V/1210
L1
1000uH/0.24A
R6
10
0R
/2W
/2
512
C33
10uF/50V/1210
1
2
J8
HDR
_
2_10
0M
IL
C32
10uF/50V/1210
1
2
J7
HDR
_
2_10
0M
IL
SE
NSO
R
C
O
NNEC
T
O
R
R9
10
K/
1%
/0
80
5
R10
10
K/
1%
/0
80
5
R11
10
K/
1%
/0
80
5
R12
10
K/
1%
/0
80
5
R13
10
K/
1%
/0
80
5
UD_IN_A
LD_IN_A
SNS_OUT_A
UD_IN_B
LD_IN_B
SNS_OUT_B
UD_IN_C
LD_IN_C
SNS_OUT_C
UD_IN_D
LD_IN_D
SNS_OUT_D
CLK_OUT
DMOD_IN_P
DMOD_IN_N
ADC1
ADC2
ADC3
OC_FAULT
PR_FAULT
OTW_FAULT
BLO1
BLO2
BLO3
BLO4
BLO5
BLO6
1
2
3
J13
HDR_1X3_100MIL
5V @ 200mA
UD_IN_A
LD_IN_A
SNS_OUT_A
UD_IN_B
LD_IN_B
SNS_OUT_B
UD_IN_C
LD_IN_C
SNS_OUT_C
UD_IN_D
LD_IN_D
SNS_OUT_D
CP_CLK_D
MOD_CLK_D
CLK_OUT
DMOD_IN_P
DMOD_IN_N
ADC1
ADC2
ADC3
OC_FAULT
PR_FAULT
OTW_FAULT
BLO1
BLO2
BLO3
BLO4
BLO5
BLO6
TRISTA
1
E-PAD
7
GND
3
OUTPUT
4
VDD
6
NC1
2
NC2
5
Y2
ASVMPC-27.000MHZ-LR-T
VDD_3P3V
R73 0R/0805/DNL
SCP
117
BLO2
130
BLO1
129
OTW_FAULT
16
PR_FAULT
14
OC_FAULT
15
RESET
18
SM_EN
17
ADC3
30
ADC2
29
ADC1
28
DMOD_IN_N
12
DMOD_IN_P
11
CLK_OUT
33
MOD_CLK
31
CP_CLK
13
SNS_OUT_D
27
LD_IN_D
10
UD_IN_D
9
SNS_OUT_C
26
LD_IN_C
8
UD_IN_C
7
SNS_OUT_B
25
LD_IN_B
6
UD_IN_B
5
SNS_OUT_A
24
LD_IN_A
4
UD_IN_A
3
BLO3
131
BLO4
132
BLO5
1
BLO6
2
VDD
23
VCC
34
SGND_1
22
SGND_2
32
SGND_3
35
SGND_4
42
SGND_5
128
U1B
LX7720
BLI1
122
ADC2_N
38
ADC2_P
39
ADC1_N
40
ADC1_P
41
ADC3_N
36
ADC3_P
37
BLI2
123
BLI3
124
BLI4
125
BLI5
126
BLI6
127
DMOD_OUT_P
46
DMOD_BW
114
DMOD_OUT_N
44
VPROG
121
BL_TH
119
MGND_5
78
SPARE
53
TESTMODE2
113
TESTMODE1
116
M2V
118
EPAD
133
U1C
LX7720
C28
0.1uF/50V/0805
C31
0.1uF/50V/0805
C30
0.1uF/50V/0805
R14 10K/1%/0805
R16 10K/1%/0805
R22 10K/1%/0805
R24 10K/1%/0805
R18 10K/1%/0805
R20 10K/1%/0805
R17 1K/1%/0805
R19 1K/1%/0805
R21 1K/1%/0805
R23 1K/1%/0805
R25 1K/1%/0805
R26 1K/1%/0805
R27 1K/1%/0805
R28 1K/1%/0805
R29 1K/1%/0805
R30 1K/1%/0805
R31 1K/1%/0805
R4
10K/1%/0805
R5
10K/1%/0805
C90
0.1uF/25V/0805
CP_CLK_D
MOD_CLK_D
1
2 3 4 5
J27
R140
49.9/1%/0805
1
2 3 4 5
J26
R141
49.9/1%/0805
CP_CLK
MOD_CLK
MOD_CLK_D
R143 33R
R142 33R
R135 33R / DNL
R136 33R / DNL
1
2
3
4
5
6
J14
HDR_1X6_100MIL
1
2
3
4
5
6
7
8
J15
HDR_1X8_SHRD_100MIL
VCC
5V @ 200mA
C34 0.1uF/50V/0805
VCC
5V @ 200mA
J_SCP
VDD_3P3V
R161
4.7K/0805
R160
100K/0805
OPEN=LOW
SCP
SCP
1
1
2
2 3
J38
HDR_3_100MIL
J_SCP
SM_EN
RESET
R158
4.7K/0805
SM_EN
RESET
R159
100K/0805
VDD_3P3V
R157
4.7K/0805
VDD_3P3V
R156
100K/0805
J_SM_EN
J_RESET
1
1
2
2 3
J39
HDR_3_100MIL
J_SM_EN
1
1
2
2 3
J40
HDR_3_100MIL
J_RESET
..
Figure 23. FPGA and Sensor Connection