M
MIC24045 EVALUATION
BOARD USER’S GUIDE
2017 Microchip Technology Inc.
DS50002619A-page 33
Appendix C. MIC24045 Internal Registers
C.1
REGISTERS MAPS AND I
2
C PROGRAMMABILITY
The MIC24045 internal registers are summarized in
Table C-1
, below.
C.1.1
Status Register
In the read-only Status registers, diagnostic information is provided. Bits can be
F = latched (Flag) or S = non-latched (Status).
Flag bits are set when the corresponding fault condition has occurred and do not return
to zero once the fault condition has ceased. Flags can only be cleared by writing ‘
1
’ in
Bit 0 of the Command Register 4h, or by power cycling. Status bits are set when the
corresponding fault condition has occurred and return to zero automatically once the
fault condition has ceased.
Default bits value at power-up is zero, except for Bit2 (which will always be read as ‘
1
’)
and Bit1 (QHS), which is ‘
1
’ if no fault conditions are detected.
TABLE C-1:
MIC24045 REGISTER MAP
Register
Address
Register
Name
Type
B7
B6
B5
B4
B3
B2
B1
B0
0h
Status
RO
OCF
ThSDF
ThWrnF Reserved EnS
Reserved Reserved
PGS
1h
Setting 1
RW
ILIM1
ILIM0
Freq2
Freq1
Freq0
Reserved Reserved Reserved
2h
Setting 2
RW Reserved
SUDly2
SUDly1
SUDly0
Mrg1
Mrg0
SS1
SS0
3h
VOUT
RW
VOUT7
VOUT6
VOUT5
VOUT4
VOUT3
VOUT2
VOUT1
VOUT0
4h
Com-
mand
RW Reserved Reserved Reserved Reserved Reserved Reserved Reserved
ClFF
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