©
2008 Microchip Technology Inc.
DS70332A-page 13
dsPIC
®
DSC DTMF DETECTION
LIBRARY USER’S GUIDE
Chapter 2. Configuring the Analog Front End (AFE)
The Analog Front End (AFE) on the dsPICDEM.net Connectivity Development board
uses the Silicon Laboratories’ Si3034 and Si3035 chipsets. These chipsets contain an
integrated Data Access Arrangement (DAA) that provides a programmable line
interface to support global telephone line interface requirements. A careful review of
this chapter is essential for understanding how to configure the Analog Front End (AFE)
of your application. Topics covered include:
• Analog Front End (AFE) Overview
• Gain Control Register Settings
• Si3035 – FCC Options
• Si3034 – Global-Based Chipset Options
2.1
ANALOG FRONT END (AFE) OVERVIEW
The Si3034 and Si3035 chipsets consist of the following DAA and AFE ICs:
• Si3034 chipset
- Si3021 AFE
- Si3014 DAA
• Si3035 chipset
- Si3021 AFE
- Si3012 DAA
The Si3021 chipset is configured as the Master device and uses its internal clock
circuitry to generate the serial bit clock and frame sync clock at a specific sampling rate.
The dsPIC33F is configured as the slave device. The Si3034/Si3035 AFE is configured
for the 8 kHz sampling rate, which is used during the DTMF generation-detection
phase. The dsPIC33F is configured as the Slave device.
Table 2-1 provides interface connections between the Si3021 AFE and the dsPIC33F
devices.
TABLE 2-1:
AFE CONNECTIONS TO dsPIC33F
Si3021 Pin
dsPIC33F Pin
Function
MCLK
—
AFE Clock Generation Input
SCLK
CSCK
Bit Clock
SDO
CSDI
Data Output from Si3021
SDI
CSDO
Data Input to Si3021
FSYNC
COFS
Frame Sync to dsPIC33FJ256GP710
OFHK
CN9
Hardware off-hook (not used)
RESET
RG8
AFE Device Reset
RGDT/FSD
SS2/CN11
Not used
FC/RGDT
SCK2/CN8
Not used
Содержание dsPIC DSC DTMF
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