Meilhaus Electronic redlab 1208fs, Руководство пользователя

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RedLab 1208FS User's Guide Specifications
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External trigger
Table 12. Digital trigger specifications
Parameter Conditions Specification
Trigger source (Note 6) External Digital TRIG_IN
Trigger mode Software selectable Edge sensitive: user configurable for CMOS compatible
rising or falling edge.
Trigger latency 10 µs max
Trigger pulse width 1 µs min
Input high voltage 4.0 V min, 5.5 V absolute max
Input low voltage 1.0 V max, –0.5 V absolute min
Input leakage current ±1.0 µA
Note 6:
TRIG_IN is a Schmitt trigger input protected with a 1.5 kilohm (k Ω ) series resistor.
External clock input/output
Table 13. External clock I/O specifications
Parameter Conditions Specification
Pin name SYNC
Pin type Bidirectional
Output (default) Outputs internal A/D pacer clock. Software selectable direction
Input Receives A/D pacer clock from external source.
Input clock rate 50 KHz, maximum
Input mode 1 µs min Clock pulse width
Output mode 5 µs min
Input leakage current Input mode ±1.0 µA
Input high voltage 4.0 V min, 5.5 V absolute max
Input low voltage 1.0 V max, –0.5 V absolute min
IOH = -2.5 mA 3.3 V min Output high voltage (Note 7)
No load 3.8 V min
IOL = 2.5 mA 1.1 V max Output low voltage (Note 7)
No load 0.6 V max
Note 7:
SYNC is a Schmitt trigger input and is over-current protected with a 200 Ω series resistor.