Fig.4. Operation of PPM0732 synchronization system.
The principle of PPM0732 synchronization system operation is clear
from the block-scheme and timing diagram (Fig.3 and Fig.4). The key components
are the phase detector and variable delay circuit. The phase detector compares the
time position of the output HV pulse and the position of the trailing edge of the
triggering pulse. Its output signal, which is proportional to the time difference, is
integrated and applied to the variable delay circuit. In this way, the phase detector
and variable delay circuit work together as a PLL circuit and ensure the
synchronization of the output HV pulse with the trailing edge of the triggering
pulse. Usually, a few hundred pulses are required for the phase-locking and exact
synchronization. The triggering pulse width t
trig
should be fixed and stay within
168 ns ... 175 ns because the phase capture window t
w
is 7 ns only. The capture
window t
w
is narrow, but it is enough to compensate for the temperature drift and
aging of the components.
Therefore, the output pulse position becomes stable in time and does not
depend on the heating and aging of HV switches, IC, and passive components.
The generator has internal over frequency protection. If the frequency of
the triggering pulses exceeds the maximum value, then the generator blocks the
triggering and red LED “OVERLOAD” lights on. The same occurs if the
triggering pulse is too long. Please reduce the frequency of the triggering pulses
and/or triggering pulse width.
Two fans are used for the cooling of the generator. If the temperature is
low, then the fans are stopped. The rotation speed of the fans increases with
increasing the temperature. Therefore, the cooling system stabilizes the
temperature of the generator. This improves the stability of the output pulse
waveform and reduces temperature drift.
MEGAIMPULSE LTD. 6
