CIO-DAS16/Jr User's Guide
Specifications
Digital input/output
Table 3. Digital input/output specifications
Digital type
FPGA
Configuration
4 bits as input , 4 bits as output
Number of channels
4 input, 4 output
Input low voltage
0.8 V max
Input high voltage
2.0 V min
Output low voltage (IOL = 4 mA)
0.32 V max
Output high voltage (IOH = -4 mA)
3.86 V min
Absolute maximum input voltage
-0.5V, +5.5V
Interrupts
2 through 7, programmable
Interrupt enable
Programmable
Interrupt sources
A/D End-of-conversion, DMA terminal count
Counters
Table 4. Counter specifications
Counter type
82C54
Configuration
82C54 device. 3 down counters, 16-bits each
Counter 0 — Independent, available
to user
Source:
100 kHz on board clock or external (CTR 0 Clock In)
Gate:
External (CTR 0 Gate)
Output:
Available at the user connector (CTR 0 Out)
Counter 1 — ADC Pacer Lower
Divider
Source:
1 or 10 MHz oscillator, jumper-selectable
Gate:
Tied to Counter 2 gate, programmable source: internal or
external (DIG. IN 0 / TRIGGER)
Output:
Chained to Counter 2 Clock
Counter 2 — ADC Pacer Upper
Divider
Source:
Counter 1 Output.
Gate:
Tied to Counter 1 gate, programmable source: internal or
external (DIG. IN 0 / TRIGGER)
Output:
ADC Pacer clock, available at user connector (CTR 2 Out)
Clock input frequency
10 MHz max
High pulse width (clock input)
30 ns min
Low pulse width (clock input)
50 ns min
Gate width high
50 ns min
Gate width low
50 ns min
Input low voltage
0.8 V max
Input high voltage
2.0 V min
Output low voltage
0.4 V max
Output high voltage
3.0 V min
Crystal oscillator
Frequency:
10
MHz
Frequency accuracy:
100 ppm
Power consumption
Table 5. Power consumption specifications
Parameter Specification
+5 V
680 mA typical, 850 mA max
Environmental
Table 6. Environmental specifications
Operating temperature range
0 to 50 ° C
Storage temperature range
-20 to 70 ° C
Humidity
0 to 90% non-condensing
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Содержание CIO-DAS16/Jr
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