Maxim Integrated Alameda MAXREFDES24#, Быстрый старт

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Alameda (MAXREFDES24#) LX9 MicroBoard Quick Start Guide
3
1. Required Equipment
•
PC with Windows® OS with Xilinx® ISE®/SDK version 14.2 or later and two USB
ports (Refer to Xilinx AR# 51895 if you installed ISE WebPACK
TM
design
software on your PC.)
•
License for Xilinx EDK/SDK version 14.2 or later (free WebPACK license is OK)
•
Alameda (MAXREFDES24#) board
•
Avnet Spartan®-6 LX9 MicroBoard
•
One +24V 1A DC power supply
•
One 750
Ω 0.25W resistor
2. Overview
Below is a high-level overview of the steps required to quickly get the Alameda design
running by downloading and running the FPGA project. Detailed instructions for each
step are provided in the following pages.
The Alameda (MAXREFDES24#) subsystem
reference design will be referred to as Alameda throughout this document.
1) Connect the Alameda board to the J4 and J5 ports of an LX9 MicroBoard as
shown in Figure 1 . Ensure the connector is aligned as shown in Figure 2 . The
communication between the Alameda board and the LX9 MicroBoard is through
the pins on the J4 connector. The J5 connector is for the board physical support
only.
2) Download the latest RD24V01_00.ZIP file located at the Alameda page.
3) Extract the RD24V01_00.ZIP file to a directory on your PC.
4) Open the Xilinx SDK.
5) Download the bitstream (.BIT) file to the board. This bitstream contains the FPGA
hardware design and software bootloader.
6) Open a terminal program to communicate with FPGA board.
7) Use Xilinx SDK to download and run the executable file (.ELF) on the
MicroBlaze™.