185
AD8195ACPZ (HDMI : IC101)
AD8195ACPZ Terminl Function
NOTES
1. THE AD8195 LFCSP HAS AN EXPOSED PAD ON THE UNDERSIDE OF
THE PACKAGE THAT AIDS IN HEAT DISSIPATION. THE PAD MUST BE
ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE IN ORDER
TO MEET THERMAL SPECIFICATIONS.
AD8195
TOP VIEW
(Not to Scale)
1
IN0
2
IP0
3
IN1
4
IP1
5
VTTI
6
IN2
7
IP2
10
AVCC
30 AVCC
29 PE_EN
28 TX_EN
27 AVEE
26 AVCC
25 AVCC
24 AVEE
21 COMP
40
SC
L_
IN
39
SDA_
IN
38
C
EC_
IN
37
A
VE
E
36
VR
EF
_I
N
35
SC
L_
O
U
T
34
SDA_
O
U
T
31
C
EC_
O
U
T
11
O
N
0
12
O
P0
13
VT
TO
14
O
N
1
15
O
P1
16
A
VC
C
17
O
N
2
20
O
P3
9
IP3
8
IN3
22 AVCC
23 AVCC
19
O
N
3
18
O
P2
32
A
M
U
XV
C
C
33
VR
EF
_O
U
T
PIN 1
INDICATOR
07
04
9-
00
3
AD8195
Rev. 0 | Page 6 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES
1. THE AD8195 LFCSP HAS AN EXPOSED PAD ON THE UNDERSIDE OF
THE PACKAGE THAT AIDS IN HEAT DISSIPATION. THE PAD MUST BE
ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE IN ORDER
TO MEET THERMAL SPECIFICATIONS.
AD8195
TOP VIEW
(Not to Scale)
1
IN0
2
IP0
3
IN1
4
IP1
5
VTTI
6
IN2
7
IP2
10
AVCC
30 AVCC
29 PE_EN
28 TX_EN
27 AVEE
26 AVCC
25 AVCC
24 AVEE
21 COMP
40
SC
L_
IN
39
SDA_I
N
38
CE
C_I
N
37
A
VEE
36
VR
EF
_I
N
35
SCL
_O
UT
34
SDA_O
U
T
31
CE
C_O
U
T
11
O
N0
12
O
P0
13
VT
TO
14
O
N1
15
O
P1
16
AV
CC
17
O
N2
20
O
P3
9
IP3
8
IN3
22 AVCC
23 AVCC
19
O
N3
18
O
P2
32
AM
U
XV
CC
33
VR
EF
_O
U
T
PIN 1
INDICATOR
07
04
9-
00
3
Figure 3. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
Mnemonic
Type
1
Description
1
IN0
HS I
High Speed Input Complement.
2
IP0
HS I
High Speed Input.
3
IN1
HS I
High Speed Input Complement.
4
IP1
HS I
High Speed Input.
5
VTTI
Power
Input Termination Supply. Nominally connected to AVCC.
6
IN2
HS I
High Speed Input Complement.
7
IP2
HS I
High Speed Input.
8
IN3
HS I
High Speed Input Complement.
9
IP3
HS I
High Speed Input.
10, 16, 22, 23, 25, 26, 30
AVCC
Power
Positive Analog Supply. 3.3 V nominal.
11
ON0
HS O
High Speed Output Complement.
12
OP0
HS O
High Speed Output.
13
VTTO
Power
Output Termination Supply. Nominally connected to AVCC.
14
ON1
HS O
High Speed Output Complement.
15
OP1
HS O
High Speed Output.
17
ON2
HS O
High Speed Output Complement.
18
OP2
HS O
High Speed Output.
19
ON3
HS O
High Speed Output Complement.
20
OP3
HS O
High Speed Output.
21
COMP
Control
Power-On Compensation Pin. Bypass to ground through a 10 μF capacitor.
24, 27, 37, Exposed Pad
AVEE
Power
Negative Analog Supply. 0 V nominal.
28
TX_EN
Control
High Speed Output Enable Parallel Interface.
29
PE_EN
Control
High Speed Preemphasis Enable Parallel Interface.
31
CEC_OUT
LS I/O
CEC Output Side.
32
AMUXVCC
Power
Positive Auxiliary Buffer Supply. 5 V nominal.
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