6.4 Interface Timing
6.4.1 Timing Characteristics
Basically, interface timings described here is not actual input timing of LCD module but output timing of
SN75LVDS82DGG (Texas Instruments) or equivalent.
Signal
Parameter
Symbol
MIN
TYP
MAX
Unit
Clock Timing Clock frequency
clk
50
65
81
MHz
Horizontal active
Thd
1024
1024
1024
Tclk
Horizontal blanking
Thbl
40
320
400
Tclk
Hsync Timing
Horizontal period
Th
1064
1344
1424
Tck
Vertical active
Tvd
768
768
768
Th
Vertical blanking
Tvbl
8
38
75
Th
Vsync Timing
Vertical period
Tv
776
806
843
Th
Note:DE mode only
Note: Typical value refer to VESA STANDARD
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Содержание ALF/ALH1548
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