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USING LADJ
The Level Adjust (LADJ) line allows the transceiver’s output power to be easily
adjusted for range control, lower power consumption, or to meet legal
requirements. This is done by placing a resistor between V
CC
and LADJ. The
value of the resistor determines the output power level. When LADJ is connected
to V
CC
, the output power and current consumption will be the highest. Figure 3
shows a graph of the output power vs. LADJ resistance.
This line is very useful during FCC testing to compensate for antenna gain or
other product-specific issues that may cause the output power to exceed legal
limits. A variable resistor can be temporarily used so that the test lab can
precisely adjust the output power to the maximum level allowed by law. The
variable resistor’s value can be noted and a fixed resistor substituted for final
testing. Even in designs where attenuation is not anticipated, it is a good idea to
place a resistor pad connected to LADJ and V
CC
so that it can be used if needed.
For more sophisticated designs, LADJ can also be controlled by a DAC or digital
potentiometer to allow precise and digitally-variable output power control.
TRANSFERRING DATA
Once a reliable RF link has been established, the challenge becomes how to
effectively transfer data across it. While a properly designed RF link provides
reliable data transfer under most conditions, there are still distinct differences
from a wired link that must be addressed. The LT Series is intended to be as
transparent as possible and does not incorporate internal encoding or decoding,
so a user has tremendous flexibility in how data is handled.
If you want to transfer simple control or status signals, such as button presses or
switch closures, and your product does not have a microprocessor on board (or
you simply wish to avoid protocol development), consider using an encoder and
decoder, or a transcoder IC set. These chips are available from a wide range of
manufacturers, including Linx. These chips take care of all encoding and
decoding functions, and generally provide a number of data pins to which
switches can be directly connected. In addition, address bits are usually provided
for security and to allow the addressing of multiple units independently. These
ICs are an excellent way to bring basic remote control / status products to market
quickly and inexpensively. Additionally, it is a simple task to interface with
inexpensive microprocessors, or one of many IR, remote control, or modem ICs.
It is always important to separate the types of transmissions that are technically
possible from those that are legally allowable in the country of intended
operation. Linx Application Notes AN-00125, AN-00128, and AN-00140 should
be reviewed, along with Part 15, Section 231 of the Code of Federal Regulations
for further details regarding acceptable transmission content in the U.S. All of
these documents can be downloaded from our website at
www.linxtechnologies.com.
Another area of consideration is that the data structure can affect the output
power level. The FCC allows output power in the 260 to 470MHz band to be
averaged over a 100mS time frame. Because OOK modulation activates the
carrier for a ‘1’ and deactivates the carrier for a ‘0’, a data stream that sends
more ‘0’s will have a lower average output power over 100mS. This allows the
instantaneous output power to be increased, thus extending range.
USING THE DATA LINE
The CMOS-compatible DATA line is used for both the transmitter data and the
recovered receiver data. Its function is controlled by the state of the T/R SEL line,
so it will be an input when in transmit mode and an output when in receive mode.
The output is normally connected to a transcoder IC or a microprocessor for data
encoding and decoding.
It is important to note that the transceiver does not provide hysteresis or
squelching of the DATA line when in receive mode. This means that, in the
absence of a valid transmission or transitional data, the DATA line will switch
randomly. This is a result of the receiver sensitivity being below the noise floor
of the board. This noise can be handled in software by implementing a noise-
tolerant protocol as described in Linx Application Note AN-00160. If a software
solution is not appropriate, then the transceiver can be squelched.
Squelching will disable the DATA output when the RSSI voltage falls below a
reference level. This prevents low amplitude noise from causing the DATA line
to switch, reducing hash during times that the transmitter is off or during
transmitter steady-state times which exceed 15mS.
The voltage on the A REF line is the analog reference voltage that is used by the
tranceiver’s data circuit. The received signal must be higher than this voltage for
the DATA line to activate and must then fall lower than this output for the DATA
line to deactivate. This voltage will dynamically follow the midpoint of the
received signal’s voltage. There is always about 30mVp-p noise riding on the
signal’s voltage. During times with no carrier or during transmitter steady-state
times exceeding 15mS, the reference voltage will reach a point where the noise
will cause the output to switch randomly.
To squelch the DATA line,
an offset can be added to
the A REF line by
connecting a resistor to
Vcc. This offset will keep
the reference voltage above
the noise, and quiet the
DATA line. Typical resistor
values are between 1M
Ω
and 10M
Ω
.
Squelching the output will
reduce the sensitivity of the
receiver and, therefore, the range of the system. For this reason, the squelch
threshold will normally be set as low as possible, but the designer can make the
compromise between noise level on the DATA line and range of the system. It
should also be noted that squelching will cause some bit stretching and
contracting, which could affect PWM-based protocols.
It is important to recognize that in many actual use environments, ambient noise
and interference may enter the receiver at levels well above the squelch
threshold. For this reason, it is always recommended that the product’s protocol
be structured to allow for the possibility of hashing, even when an external
squelch circuit is employed.
Figure 20: Sensitivity Degradation vs. Squelch Resistor
-1 1
8
-1 1 6
-1 1 4
-1 1 2
-1 1 0
-1 0
8
-1 0 6
-1 0 4
-1 0 2
O p e n 1 0
9 .1
8
.2
7 .5
6 .
8
6 .2
5 .6
5 .1
4 .7
4 .
3
3
.9
3
.6
3
.
3
3
2 .7
2 .2
2
1 .6
1 .
3
1
Higher
S
en
s
itivity, More H
as
h
Lower
S
en
s
itivity, Le
ss
H
as
h
S
en
s
itivity (dBm)
Re
s
i
s
tor V
a
l
u
e (M
Ω
)
