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11

LTC3736

3736fa

When a controller is enabled for Burst Mode operation, the
inductor current is not allowed to reverse. Hence, the
controller operates discontinuously. The reverse current
comparator (RICMP) senses the drain-to-source voltage
of the bottom external N-channel MOSFET. This MOSFET
is turned off just before the inductor current reaches zero,
preventing it from reversing and going negative.

In forced continuous operation, the inductor current is
allowed to reverse at light loads or under large transient
conditions. The peak inductor current is determined by the
voltage on the I

TH

 pin. The P-channel MOSFET is turned on

every cycle (constant frequency) regardless of the I

TH

 pin

voltage. In this mode, the efficiency at light loads is lower
than in Burst Mode operation. However, continuous mode
has the advantages of lower output ripple and less inter-
ference with audio circuitry.

When the SYNC/FCB pin is clocked by an external clock
source to use the phase-locked loop (see Frequency
Selection and Phase-Locked Loop), the LTC3736 operates
in PWM pulse skipping mode at light loads. In this mode,
the current comparator I

CMP

 may remain tripped for

several cycles and force the external P-channel MOSFET to
stay off for the same number of cycles. The inductor
current is not allowed to reverse, though (discontinuous
operation). This mode, like forced continuous operation,
exhibits low output ripple as well as low audio noise and
reduced RF interference as compared to Burst Mode
operation. However, it provides low current efficiency
higher than forced continuous mode, but not nearly as
high as Burst Mode operation. During start-up or a short-
circuit condition (V

FB1

 or V

FB2

 

 0.54V), the LTC3736

operates in pulse skipping mode (no current reversal
allowed), regardless of the state of the SYNC/FCB pin.

Short-Circuit Protection

When an output is shorted to ground (V

FB

 < 0.12V), the

switching frequency of that controller is reduced to 1/5 of
the normal operating frequency. The other controller is
unaffected and maintains normal operation.

The short-circuit threshold on V

FB2

 is based on the smaller

of 0.12V and a fraction of the voltage on the TRACK pin.
This also allows V

OUT2

 to start up and track V

OUT1

 more

easily. Note that if V

OUT1

 is truly short-circuited

OPERATIO

U

(Refer to Functional Diagram)

(V

OUT1 

= V

FB1

 = 0V), then the LTC3736 will try to regulate

V

OUT2

 to 0V if a resistor divider on V

OUT1

 is connected to

the TRACK pin.

Output Overvoltage Protection

As a further protection, the overvoltage comparator (OV)
guards against transient overshoots, as well as other more
serious conditions that may overvoltage the output. When
the feedback voltage on the V

FB

 pin has risen 13.33%

above the reference voltage of 0.6V, the external P-chan-
nel MOSFET is turned off and the N-channel MOSFET is
turned on until the overvoltage is cleared.

Frequency Selection and Phase-Locked Loop
(PLLLPF and SYNC/FCB Pins)

The selection of switching frequency is a tradeoff between
efficiency and component size. Low frequency operation
increases efficiency by reducing MOSFET switching losses,
but requires larger inductance and/or capacitance to main-
tain low output ripple voltage.

The switching frequency of the LTC3736’s controllers can
be selected using the PLLLPF pin.

If the SYNC/FCB is not being driven by an external clock
source, the PLLLPF can be floated, tied to V

IN

 or tied to

SGND to select 550kHz, 750kHz or 300kHz respectively.

A phase-locked loop (PLL) is available on the LTC3736 to
synchronize the internal oscillator to an external clock
source that connected to the SYNC/FCB pin. In this case,
a series RC should be connected between the PLLLPF pin
and SGND to serve as the PLL’s loop filter. The LTC3736
phase detector adjusts the voltage on the PLLLPF pin to
align the turn-on of controller 1’s external P-channel
MOSFET to the rising edge of the synchronizing signal.
Thus, the turn-on of controller 2’s external P-channel
MOSFET is 180 degrees out of phase with the rising edge
of the external clock source.

The typical capture range of the LTC3736’s phase-locked
loop is from approximately 200kHz to 1MHz, and is
guaranteed over temperature to be between 250kHz and
850kHz. In other words, the LTC3736’s PLL is guaranteed
to lock to an external clock source whose frequency is
between 250kHz and 850kHz.

Содержание No Rsense LTC3736

Страница 1: ...ent mode architecture with MOSFET VDS sensing eliminates the need for sense resistors and improves efficiency Power loss and noise due to the ESR of the input capacitance are minimized by operating th...

Страница 2: ...N PACKAGE 24 LEAD PLASTIC SSOP 24 23 22 21 20 19 18 17 16 15 14 13 SW1 IPRG1 VFB1 ITH1 IPRG2 PLLLPF SGND VIN TRACK VFB2 ITH2 PGOOD SENSE1 PGND BG1 SYNC FCB TG1 PGND TG2 RUN SS BG2 PGND SENSE2 SW2 ORDE...

Страница 3: ...0 5 VFB1 2 Input Current Note 5 10 50 nA TRACK Input Current TRACK 0 6V 10 50 nA Overvoltage Protect Threshold Measured at VFB 0 66 0 68 0 7 V Overvoltage Protect Hysteresis 20 mV Auxiliary Feedback T...

Страница 4: ...ONTINUOUS MODE SYNC FCB 0V VIN 3 3V VOUT 1 8V ILOAD 200mA FIGURE 17 CIRCUIT 4 s DIV 3736 G05 PULSE SKIPPING MODE SYNC FCB 550kHz IL 1A DIV VIN 5V RLOAD1 RLOAD2 1 FIGURE 15 CIRCUIT 200 s DIV 3736 G06 5...

Страница 5: ...vs Temperature Shutdown RUN Threshold vs Temperature RUN SS Pull Up Current vs Temperature Maximum Current Sense Threshold vs Temperature TEMPERATURE C 60 0 RUN SS VOLTAGE V 0 1 0 3 0 4 0 5 1 0 0 7 20...

Страница 6: ...nected to VFB2 from VOUT2 should be used to connect to TRACK from VOUT1 PGOOD Pin 9 Pin 12 Power Good Output Voltage Moni tor Open Drain Logic Output This pin is pulled to ground when the voltage on e...

Страница 7: ...ns19 13 Pins22 16 Bottom NMOS Gate Drive Output These pins drive the gates of the external N channel MOSFETs These pins have an output swing from PGND to SENSE SENSE1 SENSE2 Pins 21 11 Pins 24 14 Posi...

Страница 8: ...HROUGH PGND TG1 SENSE1 VIN VOUT1 CIN COUT1 MP1 MN1 BG1 R1B L1 PGND VFB1 ITH1 RITH1 CITH1 0 6V 0 12V SC1 VFB1 SW1 SENSE1 R1A EXTSS INTSS EAMP SHDN BURSTDIS SLEEP1 0 3V IPROG1 ICMP 0 15V BURSTDIS VFB1 O...

Страница 9: ...IREV2 S R RS2 ANTISHOOT THROUGH PGND SENSE2 TG2 SENSE2 VIN VOUT2 COUT2 MP2 MN2 BG2 R2B RTRACKB RTRACKA L2 PGND VFB2 ITH2 TRACK RITH2 CITH2 0 6V 0 12V SC2 TRACK VFB2 SW2 R2A VOUT1 EAMP BURSTDIS SLEEP2...

Страница 10: ...citor CSS between the RUN SS and SGND pins As the RUN SS pin continues to OPERATIO U rise linearly from approximately 0 65V to 1 3V being charged by the internal 0 7 A current source the EAMP regulate...

Страница 11: ...thresholdonVFB2 isbasedonthesmaller of 0 12V and a fraction of the voltage on the TRACK pin This also allows VOUT2 to start up and track VOUT1 more easily Note that if VOUT1 is truly short circuited O...

Страница 12: ...e maximum value of VITH is typically about 1 98V so the maximum sense voltage allowed across the external P channel MOSFET is 125mV 85mV or 204mV for the three respective states of the IPRG pin The pe...

Страница 13: ...itry Improvements in both conducted and radiatedEMIalsodirectlyaccrueasaresultofthereduced RMSinputcurrentandvoltage Significantcostandboard footprint savings are also realized by being able to use sm...

Страница 14: ...on the ITH pin is internally clamped which limits the maximum current sense threshold VSENSE MAX to approximately 128mV when IPRG is floating 86mV when IPRG is tied low 213mV when IPRG is tied high Th...

Страница 15: ...eration Shoot through between the P channel and N channel MOSFETs can most easily be spotted by monitoring the input supply current As the input supply voltage in creases iftheinputsupplycurrentincrea...

Страница 16: ...ng the controller clamps the peak inductor current to approximately I V R BURST PEAK SENSE MAX DS ON 1 4 Thecorrespondingaveragecurrentdependsontheamount of ripple current Lower inductor values higher...

Страница 17: ...N 2VOUT where IRMS IOUT 2 This simple worst case condition is commonly usedfordesignbecauseevensignificantdeviationsdonot offer much relief Note that capacitor manufacturers ripple current ratings are...

Страница 18: ...y COUT is the output capacitance and IRIPPLE is the ripple current in the induc tor The output ripple is highest at maximum input voltage since IRIPPLE increases with input voltage Setting Output Volt...

Страница 19: ...type that provides zero degrees phase shift between the external and internal oscillators This type of phasedetectordoesnotexhibitfalselocktoharmonicsof the external clock The output of the phase dete...

Страница 20: ...Phase Locked to External Clock Auxiliary Winding Control Using SYNC FCB Pin The SYNC FCB can be used as an auxiliary feedback to provide a means of regulating a flyback winding output When this pin d...

Страница 21: ...uceddownto2 4V Alsoshown is the effect on VREF Minimum On Time Considerations Minimumon time tON MIN isthesmallestamountoftime in which the LTC3736 is capable of turning the top P channel MOSFET on an...

Страница 22: ...tional loss Checking Transient Response The regulator loop response can be checked by looking at the load transient response Switching regulators take several cycles to respond to a step in load curre...

Страница 23: ...ack resistor divid ers ITH compensation networks and the SGND pin The power grounds consist of the terminal of the input and output capacitors and the source of the N channel MOSFET Eachchannelshouldh...

Страница 24: ...IPRG2 IPRG1 VFB1 ITH1 SW1 RVIN 10 RITH2 15k CITH2 220pF CSS 10nF CIN 10 F 2 CVIN 1 F VIN 5V VIN CITH2B 100pF RITH1 15k CITH1 220pF CITH1A 100pF RFB1B 187k RFB1A 59k PGOOD VFB2 TRACK 25 ITH2 TG2 LTC37...

Страница 25: ...ACKA 59k RFB2A 59k RFB2B 118k COUT2 22 F 2 COUT1 22 F 2 D1 VOUT1 2 5V 2A VOUT2 1 8V 2A 3736 F16 L1 L2 VISHAY IHLP 2525CZ 01 D2 Figure 17 2 Phase Synchronizable Dual Output Synchronous DC DC Converter...

Страница 26: ...15k CITH1 220pF CITH1A 100pF RFB1B 187k RFB1A 59k PGOOD VFB2 TRACK 25 ITH2 TG2 LTC3736EUF PGND TG1 SYNC FCB BG1 PGND 22 21 20 19 18 17 16 15 14 13 12 11 10 23 24 1 2 3 4 5 9 8 7 6 SENSE1 MP1 MP2 L1 1...

Страница 27: ...697 4 00 0 10 4 SIDES NOTE 1 DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO 220 VARIATION WGGD X TO BE APPROVED 2 ALL DIMENSIONS ARE IN MILLIMETERS 3 DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PAC...

Страница 28: ...to 36V 5V and 3 3V LDOs Switching Regulator 5mm 5mm QFN or 28 Lead SSOP LTC3736 1 Dual 2 Phase No RSENSE Synchronous Controller with VIN 2 75V to 9 8V IOUT Up to 5A 4mm 4mm QFN Package Spread Spectrum...

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