8
LTC3729
sn3729 3729fas
PI FU CTIO S
U
U
U
PLLFLTR (Pin 5/Pin 2):
The Phase-Locked Loop’s Low
Pass Filter is tied to this pin. Alternatively, this pin can be
driven with an AC or DC voltage source to vary the
frequency of the internal oscillator.
PLLIN (Pin 6/Pin 3):
External Synchronization Input to
Phase Detector. This pin is internally terminated to SGND
with 50k
Ω
. The phase-locked loop will force the rising top
gate signal of controller 1 to be synchronized with the
rising edge of the PLLIN signal.
PHASMD (Pin 7/Pin 4):
Control Input to Phase Selector
which determines the phase relationships between con-
troller 1, controller 2 and the CLKOUT signal.
I
TH
(Pin 8/Pin 5):
Error Amplifier Output and Switching
Regulator Compensation Point. Both current comparator’s
thresholds increase with this control voltage. The normal
voltage range of this pin is from 0V to 2.4V.
SGND (Pin 9/Pin 6):
Signal Ground, common to both
controllers, must be routed separately from the input
switched current ground path to the common (–)
terminal(s) of the C
OUT
capacitor(s).
V
DIFFOUT
(Pin 10/Pin 7):
Output of a Differential Amplifier
that provides true remote output voltage sensing. This pin
normally drives an external resistive divider that sets the
output voltage.
V
OS
–
, V
OS
+
(Pins 11, 12/Pins 8, 9):
Inputs to
an Opera-
tional Amplifier. Internal precision resistors capable of
being electronically switched in or out can configure it as
a differential amplifier or an uncommitted Op Amp.
PGOOD (Pin 15/Pin 13):
Open-Drain Logic Output. PGOOD
is pulled to ground when the voltage on the EAIN pin is not
within
±
7.5% of its set point.
TG2, TG1 (Pins 16, 27/Pins 14, 26):
High Current Gate
Drives for Top N-Channel MOSFETS. These are the out-
puts of floating drivers with a voltage swing equal to
INTV
CC
superimposed on the switch node voltage SW.
SW2, SW1 (Pins 17, 26/Pins 15, 25):
Switch Node
Connections to Inductors. Voltage swing at these pins is
from a Schottky diode (external) voltage drop below
ground to V
IN
.
BOOST2, BOOST1 (Pins 18, 25/Pins 17, 24):
Bootstrapped
Supplies to the Topside Floating Drivers. Capacitors are
connected between the Boost and Switch pins and Schot-
tky diodes are tied between the Boost and INTV
CC
pins.
Voltage swing at the Boost pins is from INTV
CC
to
(V
IN
+ INTV
CC
).
BG2, BG1 (Pins 19, 23/Pins 18, 22):
High Current Gate
Drives for Bottom Synchronous N-Channel MOSFETS.
Voltage swing at these pins is from ground to INTV
CC
.
PGND (Pin 20/Pin 19):
Driver Power Ground. Connect to
sources of bottom N-channel MOSFETS and the (–) termi-
nals of C
IN
.
INTV
CC
(Pin 21/Pin 20):
Output of the Internal 5V Linear
Low Dropout Regulator and the EXTV
CC
Switch. The driver
and control circuits are powered from this voltage source.
Decouple to power ground with a 1
µ
F ceramic capacitor
placed directly adjacent to the IC and minimum of 4.7
µ
F
additional tantalum or other low ESR capacitor.
EXTV
CC
(Pin 22/Pin 21):
External Power Input to an
Internal Switch . This switch closes and supplies INTV
CC,
bypassing the internal
low dropout regulator whenever
EXTV
CC
is higher than 4.7V. See EXTV
CC
Connection in the
Applications Information section. Do not exceed 7V on
this pin and ensure V
EXTVCC
≤
V
INTVCC
.
V
IN
(Pin 24/Pin 23):
Main Supply Pin. Should be closely
decoupled to the IC’s signal ground pin.
CLKOUT (Pin 28/Pin 27):
Output Clock Signal available to
daisychain other controller ICs for additional MOSFET
driver stages/phases.
G Package/UH Package
