Linear Technology LTC1760, Руководство пользователя

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LTC1760
16
1760fc
For more information www.linear.com/LTC1760
Function
LTC1760
Mode Access
SMBus
Address
Command
Code
Data
Type
Data Bit or Nibble Definition/Allowed Values
(See section 2.3 for Details)
D15 D14 D13 D12 D11 D10 D09 D08 D07 D06 D05 D04 D03 D02 D01 D00
Current() Master Read 7-bit:
0001_011b
8-bit:
0
×
16
0
×
0A Value
IA15 IA14 IA13 IA12 IA11 IA10 IA09 IA08 IA07 IA06 IA05 IA04 IA03 IA02 IA01 IA00
0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
Voltage() Master Read 7-bit:
0001_011b
8-bit:
0
×
16
0
×
09 Status/
Control
VA15 VA14 VA13 VA12 VA11 VA10 VA09 VA08 VA07 VA06 VA05 VA04 VA03 VA02 VA01 VA00
0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
ChargingCurrent() Master Read 7-bit:
0001_011b
8-bit:
0
×
16
0
×
14 Status
IR15 IR14 IR13 IR12 IR11 IR10 IR09 IR08 IR07 IR06 IR05 IR04 IR03 IR02 IR01 IR00
0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
ChargingVoltage() Master Read 7-bit:
0001_011b
8-bit:
0
×
16
0
×
15 Status/
Control
VR15 VR14 VR13 VR12 VR11 VR10 VR09 VR08 VR07 VR06 VR05 VR04 VR03 VR02 VR01 VR00
0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
AlarmWarning() Master Read 7-bit:
0001_010b
8-bit:
0
×
16
0
×
16 Status
OVER_CHARGED TERMINATE_CHARGE_ALARM TERMINATE_CHARGE_RESERVED OVER_TEMP_ALARM TERMINATE_DISCHARGE_ALARM RESER
VED
RESER
VED
RESER
VED
RESER
VED
RESER
VED
RESER
VED
FULLY_DISCHARGED RESER
VED
RESER
VED
RESER
VED
RESER
VED
0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
AlertResponse()
see (1)
Slave Read
Byte
7-bit:
0001_100b
8-bit:
0
×
18
N/A Register
ARA_ADD07 ARA_ADD06 ARA_ADD05 ARA_ADD04 ARA_ADD03 ARA_ADD02 ARA_ADD01 ARA_ADD00
0 0 0 1 0 1 0 0
(1) Read-byte format. 0
×
14 is returned as the interrupt address of the LTC1760.
OPERATION