3.13 Multimedia Chip Interface
3.13.1 Host Interface
The HOST interface connects the ZR345X and the host processor (a handset baseband chip) in two
optional modes:
• On the host memory bus.
• On the host LCD bus.
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3. TECHNICAL BRIEF
LGE Internal Use Only
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes
0603
VREG_MSMP_2.7V
TP302
TP301
TP300
10K
R305
R306
0
L13
NALE
M13
L12
NCSN
B7
HRDN
HWRN
B9
B11
A11
HD13
HD14
C9
B10
HD15
HD2
C12
C13
HD3
C14
HD4
HD5
B14
HD6
C11
B13
HD7
A14
HD8
HD9
A13
HGINTN
A7
A10
HA11
HA12
A9
C8
HA13
C7
HA14
HCS0N
B8
HCS1N
A8
HD0
D12
HD1
C10
B12
HD10
A12
HD11
HD12
EBI2_ADDR[11]
EBI2_ADDR[13]
EBI2_ADDR[14]
EBI2_DATA[0]
EBI2_ADDR[12]
MMP_CS_N
MMP_INT_N
EBI2_OE_N
EBI2_WE_N
EBI2_DATA[0:15]
EBI2_DATA[15]
EBI2_DATA[14]
EBI2_DATA[13]
EBI2_DATA[12]
EBI2_DATA[11]
EBI2_DATA[10]
EBI2_DATA[9]
EBI2_DATA[8]
EBI2_DATA[7]
EBI2_DATA[6]
EBI2_DATA[5]
EBI2_DATA[4]
EBI2_DATA[3]
EBI2_DATA[2]
EBI2_DATA[1]
[ Block Diagram ]
[ Schematics ]