LG RE-44SZ21RD, Руководство по обслуживанию

Страница: 20 / 46

- 20 -
RS -2 32C
Ready2
VPC3230
Main
AD9883
EPLD
LS123
VPC3230
Sub
LP F
TMDS
Encoder
V3
SDRAM
SDRAM
Ready2
13.5
M VCXO
27
M OSC
PW
M
SYS CLK
DISPLA
Y
CLK
HV
AND
H
Active
V
Active
MAX232A
Rx/
Tx
JT
AG
VS_ALL
HS_ALL
27
MHz
CLK_M
HV
CL AM P
FID _M
FID _M
Data_S/CLK_S/HV_S/FID_S
Data_M/CLK_M/HV_M
FID _32 30
V3INT
IIC2 IIC1 IIC0
IIC1
MODE1 MODE2
DISPLA
Y
CLK
YCbCr
_All
RGB_SCAR
T
MODE3
HV _S EL
YCbCr
_M
TXT_FB
CLK_S
FB_TXT
MO DE 1
MO DE 2
FB_DLD
HV_TXT
HV_S
HV_M H
V
_
S
E
L
C1 A1
SYNCV
AL
RESET
3.3
V
RST
RS T
VD P _R S T
GND
TXC-
TXC+
GND
TX0-
TX0+
GND
TX1-
TX1+
GND
TX2-
TX2+
TXT_FB
SUB_Cr
SUB_Y
SUB_Cb
SDA2
SCL2
GND
SYNCVAL
Y_S/
Cb
_S/Cr_S
FB_TXT
, FS
IIC1,IIC2
OSD_ACT
_DLD
AV _V S
AV
_H S
AL
L_ Cr
AL
L_ Y
AL
L_ Cb
S C _G
S C
_B
S C _R
M_ Cr
MA IN _Y
S U B_ Cb
S U B_ Y
S U
B_ Cr
M_ C
M_ Y
M_
V
M_ Cb
3.3 V
2.5 V
5.0 V
S C L0
S D A0
S C L1
S D A1
V3 IN T
S _V /Y
S _C
FB _T XT
HS _T XT
VS _T XT
FS
An a _i n
Dig i_ out
I2 S _C W
I2 S _C L
S W 1_M AIN
FS
MO DE 3
S W 2_M AIN
S W 1_M AIN
S W 2_M AIN
SDA1
SCL1
YS
CTL_A
DC F_R S T
DC F_R S T
YS
CT L_ A
Rx/
Tx
567P
3. Digital Board Block