LG RD-JT51, Руководство по обслуживанию

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A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
SCL
P
O
W
E
R
O
N
GGE[7:0] GGE[7:0]
CS0n CS0n
A
0
R
O
M
W
E
n
DVS
ECO-MODE
B
H
E
N
n
R
E
S
E
T
A
[1
9
:1
]
D EN
GVS GVS
D
C
K
E
X
T
GRE[7:0] GRE[7:0]
SDA
DGE[7:0]
DBE[7:0]
RESETZ
DCLK
GCOAST GCOAST
GFBK GFBK
LAMPLITZ
FAN_P
GBE[7:0] GBE[7:0]
GCLK GCLK
GBLKSPL GBLKSPL
CS1n CS1n
R
O
M
O
E
n
D
[0
:1
5
]
GHS GHS
V
P
P
E
N
D HS
POWERON
K
E
Y
S
T
O
N
E
DRE[7:0]
M
C
K
E
X
T
SDA
IR
R
C
V
R
IRR CVR
GAIN_C GAIN_C
BAIN_C BAIN_C
CONTROL
HSYN C HSYNC
RAI N_C RAI N_C
TXD TXD
VSYNC_C VSYNC_C
RXD RXD
VHS VHS CVBS CVBS
G
A
IN
_
V
VVS VVS
VY[7 :0] VY[7 :0]
B
A
IN
_
V
CHROMA CHROMA
SDA
LUMA LUMA
VUV[7:0] VUV[7:0]
VCLK VCLK
VFIELD VFIELD
VPEN VPEN
R
A
IN
_
V
A
V
D
D
SCL
RESETn
SCL
SDA
SCL
D[0:7]
D
[0
:7
]
3.3V
VDD
SCL
SDA
GND
POWERON
DEN
RESETZ
LAMPLITZ
DGE[7:0]
DHS
DRE[7:0]
DCLK
DVS
DBE[7:0]
ECO-MODE
FAN_P
VDD
3.3V
VDD
VDD
3.3V
VDD
3.3V
3.3V
VDD
3.3V
VDD
V33
VDD
Note: To DDP1000 input port
Note: Lamp on/off detect signal.
Note: PW164B RS232 I/O port connect with
PC ( for control ) and Ballast ( for lamp
stasus )
Regect RC1 and RC2 before connect DX660 main board with
INTERFACE board.
PAGE_10
015_PW166
VCLK
VFIELD
VVS
VHS
VPEN
VY[7:0]
GGE[7:0]
GRE[7:0]
GVS
GBLKSPL
GHS
GFBK
GCLK
GBE[7:0]
GCOAST
T
D
O
T
X
D
R
O
M
W
E
n
T
C
K
R
X
D
M
C
K
E
X
T
R
O
M
O
E
n
IR
R
C
V
R
T
M
S
A
[1
9
:1
]
D
C
K
E
X
T
R
E
S
E
T
D
[0
:1
5
]
SDA
DVS
DHS
DRE[7:0]
DCLK
DGE[7:0]
DBE[7:0]
A
0
B
H
E
N
n
DEN
VUV[7:0] POWERON
RESETZ
DRO[7:0]
DGO[7:0]
DBO[7:0]
SCL
V
P
P
E
N
A
U
D
IO
_
M
U
T
3.3V
CS0n
LAMPLITZ
GND
ECO-MODE
K
E
Y
S
T
O
N
E
A
U
D
IO
_
V
O
L
CS1n
FAN_P
VDD
D
[0
:7
]
C
O
N
T
R
O
L
key8
DECODE
012_DECODE
VDD
VUV[7:0]
SCL
SDA
V33
VY[7:0]
VHS
VVS
VPEN
CVBS
VCLK
VFILD
LLC1
LLC2
LUMA
CHROMA
G
A
IN
_
V
R
A
IN
_
V
B
A
IN
_
V
A
V
D
D
GND
PAGE_12
017_KEY
D[0:7]
CS0n VDD
3.3V
GND
CS1n
RESETn
IR
R
C
V
R
key8
PAGE_11
016_MISC
P
O
W
E
R
O
N
D
C
K
E
X
T
M
C
K
E
X
T
VDD
3.3V
GND
K
E
Y
S
T
O
N
E
S
D
A
S
C
L
PAGE_8
013_AFE
SCL
SDA
GBLKSPL
GCOAST
HSYNC
GBE[7:0]
GGE[7:0]
GRE[7:0]
GFBK
GHS
GVS
GCLK
VDD
GND
RAIN_C
GAIN_C
BAIN_C
VSYNC_C
R
A
IN
_
V
G
A
IN
_
V
B
A
IN
_
V
A
V
D
D
V33
INPUT
011_INPUT
RXD
TXD
HSYNC
BAIN_C
RAIN_C
GAIN_C
VSYNC_C
CONTROL
VDD
3.3V
G
N
D
CVBS
LUMA
CHROMA
PAGE_9
014_MEMORY&KEYSTONE
V
P
P
E
N
A
[1
9
:1
]
D
[0
:1
5
]
3.3V
GND
R
O
M
W
E
n
R
O
M
O
E
n
SCL
SDA
A
0
B
H
E
N
n
R
E
S
E
T
RESETn
VDD