6. BLOCK DIAGRAM
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Copyright © 2012 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
8. RF Block Diagram : BLUETOOTH & Wi-Fi & FM _ U2(EU)
XTAL
37.4MHz
BT_UART_RXD
UART2_RX
UART2_TX
UART2_RTS
UART2_CTS
CLK32K_GATE
BT_EN
BT_PCM_CLK
BT_PCM_SYNC
GPIO[166]
McBSP1_CLKX_GPIO[114]
McBSP1_FSX_GPIO[117]
SDIO_CMD
SDIO_CLK
WLAN_SDIO[0]
BT/ WLAN Ant.
WLAN_EN
SDMMC5_CMD_GPIO[146]
SDMMC5_CLK_GPIO[145]
LPO
OMAP4430
Wi-Fi / BT
BCM4330X
WLBGA
WLAN_CMD
WLAN_CLK
GPIO[168]
BT_REG_ON
BT_PCM_CLK
BT_PCM_SYNC
WRF_XTAL_ON
BT_UART_TXD
BT_UART_RXD
BT_UART_RTS/
BT_UART_CTS/
CLK32KG
WLAN_HOST_WAKEUP
GPIO[167]
BT_PCM_DIN
BT_PCM_DOUT
McBSP1_DR_GPIO[115]
McBSP1_DX_GPIO[116]
BT_PCM_OUT
BT_PCM_IN
SDMMC5_DAT0_GPIO[147]
SDMMC5_DAT1_GPIO[148]
SDMMC5_DAT2_GPIO[149]
SDMMC5_DAT3_GPIO[150]
TWL6030
SDIO_DATA_0
XO_IN
XO_OUT
WRF_RFIN_2G
WRF_XTAL_OP
BT_UART_TXD
BT_UART_RTS_N
BT_UART_CTS_N
BT_RST_N
SDIO_DATA_1
SDIO_DATA_2
SDIO_DATA_3
WL_REG_ON
WLAN_SDIO[1]
WLAN_SDIO[2]
WLAN_SDIO[3]
WL_GPIO_0
GPIO[160]
GPIO[23]
BT_HOST_WAKEUP
BT_WAKEUP
BT_GPIO_1
BT_GPIO_0
Diplexer
BT_RF_TX
WLAN_RF_RX
WLAN_RF_TX
WRF_RFOUT_2G
BT_RF
WLAN_SW_[0]
WRF_RFIN_5G
WRF_RFOUT_5G
WRF_A_TSSI_IN
RF_SW_CTRL_0
WLAN_SW_[1]
WLAN_SW_[2]
WLAN_SW_[3]
RF_SW_CTRL_1
RF_SW_CTRL_2
RF_SW_CTRL_3
RF_SW_CTRL_4
RF_SW_CTRL_5
RF_SW_CTRL_6
RF_SW_CTRL_7
FEM
RF5501
ANT
BT
TX_IN
RX_OUT
C_BT
C_RX
C_TX
LNA_EN
FEM
MDFE2PFA-023
ANT
RX
VDET
TX
VC2
VC1
LNA_EN
VREF
BPF
5G_WLAN_RF_TX
5G_WLAN_RF_RX
5G_A_TSSI
WLAN_SW_[4]
WLAN_SW_[5]
WLAN_SW_[6]
WLAN_SW_[7]
AFML
TWL6040
AFMR
FM_AOUT_1
FM_AOUT2 FM_AUDIO_R
FM_ANT
FM_RXN
FM_RXP
FM Ant.
(Ear_jack)
FM_AUDIO_L
RF Block Diagram : BLUETOOTH & Wi-Fi & FM_P768