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Copyright © 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
6. CIRCUIT DIAGRAM
R10000
DNI
2
1
TOL=0.01
51K
R4102
MIC_BIAS_2
TP4100
C4108
1u
1u
C4100
MIC_BIAS_1
+4V9_VCHG_LDO
VBAT
VCDT
VDRV
ISENSE
BATSNS
BATON
RESETB
PWRKEY
PMU_TESTMODE
SYSRSTB
FSOURCE
INT
CHG_DP
CHG_DM
VBAT_SPK
GND_SPK
AU_MICBIAS0
AU_MICBIAS1
AU_VIN0_P
AU_VIN0_N
AU_VIN1_P
AU_VIN1_N
AU_VIN2_P
AU_VIN2_N
SPK_N
SPK_P
ACCDET
SPI_CLK
SPI_CSN
SPI_MOSI
SPI_MISO
SIM1_AP_SCLK
SIM1_AP_SRST
SIMLS1_SCLK
SIMLS1_SIO
SIMLS1_SRST
SIM2_AP_SCLK
SIM2_AP_SRST
SIMLS2_SCLK
SIMLS2_SIO
SIMLS2_SRST
XIN
XOUT
RTC_32K1V8
CHRLDO
EXT_PMIC_EN
SRCLKEN
FCHR_ENB
AUXADC_VREF18
AUXADC_AUXIN_GPS
AVSS28_AUXADC
CLK26M
RTC_32K2V8
SIMLS1_AP_SIO
SIMLS2_AP_SIO
AU_HSP
AU_HSN
AU_HPL
AU_HPR
AUD_MOSI
AUD_CLK
AUD_MISO
MT6323
U4100
B6
E8
E7
J4
H4
G1
H1
K11
M11
C4
E1
B2
B1
C2
M1
A2
N12
N13
D5
A4
A3
K10
L11
K9
D6
C5
M10
N11
M9
E6
B5
B8
D8
B7
D9
E2
K1
L1
D1
D2
G4
G3
F4
E4
G2
F2
L2
P1
A10
A11
A7
A9
A1
N2
M2
K4
K3
P13
P12
M13
A12
R4101
3.3K
VBAT
0
R4104
0.1u
C4107
C4102
0.1u
1
2
0.1u
C4105
C4106
0.1u
R4100
TOL=0.01
330k
TP4101
1
22p
C4110
1
2
22p
C4109
1
2
32.768KHz
X4100
FC-135
2
1
TP4102
1
TP4103
1
CN10001
11
10
9
5
4
3
2
1
8
7
6
D1
D2
CN9100
4
6
3
2
1
5
R9535
100K
TOL=0.01
2
1
R9204
470K
TOL=0.01
R9203
TOL=0.01
100K
+1V8_MTK_VIO
P2
2
P4
4
P1
1
P3
3
P6
6
P5
5
FL10001
1
2
D10006
VBUS_USB_IN
1u
C10000
C4103 1u
C10001
22p
IN
OUT
GND1 GND2
FL10000
VA9504
VA9503
TOL=0.01
62K
R9532
2
1
100n
C9518
100p
C9519
1u
C9520
VREF_BAT_THERM
TOL=0.01
4.7K
R9536
2
1
VBAT
1K
R9533
TOL=0.01
100
R9534
2
1
C9100
47u
2
1
D10000
2
1
1u
C4104
1
2
C4111 1u
1
2
1u
C4112
1
2
VREF_BAT_THERM
SR_CLK_EN
USB_D_P
USB_D_M
SYS_RESIN_N
CHG_D_N
CHG_D_P
BAT_ID
GND_AUXADC
26M_AUDIO_CLK
USB_ID
MIC_IN1_P
VBAT_THERM
VBAT_THERM
RCV_SPK_P
SIM1_CLK_PM
SIM1_RESET_PM
EAR_MIC_JACK
MIC_IN1_N
MIC_IN2_N
PM_KYPD_PWR_N
SIM1_DATA_PM
AUXADC_TSX
SIM2_DATA_PM
SIM2_CLK_PM
SIM2_RESET_PM
MIC_IN3_N
MIC_IN3_P
HPH_L
HPH_R
RCV_SPK_N
HOOK_DETECT
BAT_ID_PULLUP
SIM2_RESET_N
SIM1_RESET_N
SIM2_DATA
SIM1_DATA
AUDIO_CLK
AUDIO_DATA_MOSI
AUDIO_DATA_MISO
PMIC_INT
SIM1_CLK
SIM2_CLK
PMIC_SPI_MISO
PMIC_SPI_CS
PMIC_SPI_SCK
PMIC_SPI_MOSI
SLEEP_CLK_IN
WATCHDOG_RESET_OUT
<4-1-7-1_MT6323_DATA> Rev_0.4
Cap must to be close
to PMIC AUXADC_AUXIN_GPS pin
Note 1
Note 2
Note 1
Connect TSX/XTAL GND
to AUXADC_GND first
Close to PMIC
ISENSE/BSTSNS 4mil
Cap must to be close to PMIC
differential to Rsense
than connect to main GND.
1%
1%
0 ohm
DNI
DNI
O
O
DNI
O
X4100
C4110
C4109
R4104
32K Less
RTC 32K
0 ohm
Note 3
Don't place any capacitor on 26MHz clock
between MT6166 & MT6323
Refer to GPS co-clock layout rule
If you use digital MIC, please change cap to 1.0uF
Note 3
< 9-2-1_IO_USB2.0 >
Rev_0.5
<9-1-2_Battery_CNT_4P>
Routing Width 2mm
REV.0.4
If battery NTC is 10kohm, R9101=16.9K, R9104=27K
If battery NTC is 47kohm, R9101=61.9K, R9104=100K
R9101, R9104 must to be close to PMIC AUXADC_REF pin.
C4101
1
2
2.2U
PGND
VIN
BATT
ISET
PGB
GND1
CHGSB
LDO
GND2
IEOC
EN_SET
1
2
47K
R4700
VBUS_USB_IN
1
2
R4701
100K
+1V8_MTK_VIO
2
1
C4700
1u
VBAT
2
1
1u
C4701
+4V9_VCHG_LDO
2
1
C4702
1u
11
1
10
2
9
3
8
4
7
5
6
RT9536GQW
U4700
CHG_EN
CHG_STAT
680 ohm : 820mA
646mA (Need to change 1%)
Rev_0.3
IEOC Setting
ISET Setting
3.3K ohm 16.5%
820 ohm : 680mA
750 ohm : 750mA
560 ohm : 910mA
<4-7-1-1_Linear Charger_RT9536>
NOTE1
NOTE1
NOTE2
NOTE2
C9598
1
2
DNI
R4702
2
1
680
TOL=0.01
C9599
1
2
DNI
R4703
2
1
3.3K
TOL=0.01
C9202
1
2
DNI
2K ohm 10%
R4103
2
1
0
R9107
2
1
1K
TOL=0.01