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Copyright © 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
6. CIRCUIT DIAGRAM
100K
TOL=0.01
R1510
2
1
0
R1505
2
1
0
R1506
1u
C1500
1
2
470n
C1501
470n
C1502
470n
C1503
470n
C1504
RT1
XT2
XT1
RT2
X1500
OZ26000004
26M
2
1
3
4
+2V8_MTK_VTCXO
470n
C1505
C1506
470n
+1V8_MTK_VIO
+2V8_MTK_VTCXO
+1V825_MTK_VRF
DET
XTAL1
XTAL2
BSI_EN
BSI_DATA0
BSI_DATA1
BSI_DATA2
CLK_SEL
EN_BB
TMEAS
RCAL
VTXHF
VRXHF
VTCXO28
VXODIG
V28
TST1
TST2
GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND25 GND26 GND27 GND28 GND29 GND30 GND31 GND32 GND33 GND34 GND35 GND36 GND37 GND38 GND39 GND40 GND41 GND42 GND43 GND44
2GHB_TX
2GLB_TX
3GH1_TX
3GH2_TX
3GL5_TX
HB_RXP
HB_RXN
LB_RXP
LB_RXN
3GB1_RXP
3GB1_RXN
3GB2_RXP
3GB2_RXN
3GB5_RXP
3GB5_RXN
3GB8_RXP
3GB8_RXN
B40_RXP
B40_RXN
RFVCO_MON
G2
3GTX_IP
3GTX_IN
3GTX_QP
3GTX_QN
RX_IP
RX_IN
RX_QP
RX_QN
BSI_CLK
TXBPI
DETGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
NC
VRXLF
VTXLF
AVDD_VIO18
GND9 GND10 GND11 GND12 GND13 GND14
XO4 XO3 XO2 XO1
XMODE
32K_EN OUT32K
MT6166
U1500
K5
G1
L5
L4
K3
L2
K4
H9
H4
H3
G9
G4
G3
K6
J11
L7
L11
J9
J8
J7
J6
J5
J4
J3
J2
D10
H10
H6
K9
K10
K8
L8
F11
F10
G11
G10
B1
A1
B6
A6
B4
B3
B5
A5
A3
A2
D1
C1
F1
E1
A10
A9
A8
A11
B8
F9
F6
F5
F4
F3
E9
E8
E7
E6
E5
E4
E3
D9
D8
D7
D6
D5
D4
D3
C10
C9
C8
C7
C6
C5
C4
C3
C2
B10
B7
K11
L10
E10
K7 K1
F2
B11
J10
C11
L1
K2
G8
H8
F8
G6
H2
J1
D11
+1V8_MTK_VIO
R1509
0
TOL=0.01
R1514
2K
VREF_BAT_THERM
SR_CLK_EN
SR_CLK_EN
BB_CLK
WLAN_CLK
GND_AUXADC
26M_AUDIO_CLK
PDET_IN
26M_DTV_CLK
RFIC0_TXBB_I_P
RFIC0_TXBB_I_N
RFIC0_TXBB_Q_P
RFIC0_TXBB_Q_N
RFIC0_PRXBB_I_P
RFIC0_PRXBB_I_N
RFIC0_PRXBB_Q_P
RFIC0_PRXBB_Q_N
RFIC0_TX_BPI
RFIC0_BSI_CLK
RFIC0_BSI_EN
RFIC0_BSI_DATA_0
RFIC0_BSI_DATA_1
RFIC0_BSI_DATA_2
AUXADC_TSX
3G_TX_LB
3G_TX_HB_1
3G_TX_HB_2
3G_RX_B2_N
3G_RX_B8_N
3G_RX_B8_P
3G_RX_B2_P
3G_RX_B1_N
3G_RX_B1_P
3G_RX_B5_P
3G_RX_B5_N
2G_RX_HB_N
2G_RX_LB_P
2G_RX_HB_P
2G_RX_LB_N
2G_TX_HB
2G_TX_LB
Route VREF_BAT_THERM with 4mil trace width
Route AUXADC_GND with 24mil trace width
< 1-4-2-1_RFIC_MT6166 >
under VREF_BAT_THERM / AUXADC_TSX trace
+1V8_VDDIO
+2V8_VTCXO
VXODIG
32K_XO
32K_Less
+2V2V8_VTCXO
+1V8_VDDIO
0
XMODE
32K_EN
NOTE 1
X1500_DCXO_32K XO Option
Route AUXADC_TSX with 4mil trace width
GPS co-CLK Crystal
connect to Main GND directly
12mil(100mA)
12mil(125mA)
10mil(35mA)
10mil(35mA)
Exchange Rx Pin(B5<->B8)
for layout
C1507
1
2
1u
L1500
2
1
2n
TOL=0.1nH
L1501
2
1
2n
TOL=0.1nH