3. TECHNICAL BRIEF
- 43 -
CPU INTERFACE
CPU interface is an 8-bit parallel.
4 control signal(/wr,/rd,/cs,A0 pin), 8 data bit(D0 to D7), and 1 interrupt pin(/IRQ), totaling 13 pins are
connected to the external CPU. This block controls the writing and reading of data by the input polarity of
control signal
INTERFACE REGISTER
This registeris able to access directly ffrom the external CPU. There are 2 bytes spaces. The Intermediate
register can be accessed through the interface register.
INTERMEDIATE REGISTER
This register is accessed through the Interface register.
It is composed to access a latter control register and ROM/SRAM through Intermediate register. This
register is called “Intermediate register” since this exists in the middle of the interface register and the
Control register. In the Intermediate register, there are some registers to control various functions.
NAUXCS1
MIDI
GPIO12
GPIO37
1u
C222
0
C209
82K
27K
R210
R211
R212
3.3K
_MIDI_CS
SPOUT1L
SPOUT1R
J8
B8
SPOUT2L
H8
SPOUT2R
SPVDDL
A6
J6
SPVDDR
A7
SPVSSL
SPVSSR1
H7
J7
SPVSSR2
E8
TXOUT
VREF
F7
_CS
H3
D4
_IRQ
H4
_RD
_RST
B4
_WR
J2
HPOUTL
HPOUTR
C7
HPVSS
D8
IOVDD1
H1
B3
IOVDD2
C2
LDE1_GPIO4
C3
LED0
LED2_GPIO5
B1
LRCK
D3
B2
MTR
NC1
A1
A8
NC2
J1
NC3
PLLC
H5
RXIN
C6
SDI
D1
B7
A3
DVSS3
E1
EQ1L
B5
J5
EQ1R
A4
EQ2L
EQ2R
G6
EQ3L
A5
H6
EQ3R
G7
EXC
B6
EXTIN
EXTOUT
D7
D6
GPIO0
GPIO1
C5
GPIO2
C1
C4
GPIO3
F6
HPC
C8
BBL
BBR
E7
D2
BLCK
CLKI
G5
H2
D0
G3
D1
G2
D2
D3
F3
G1
D4
D5
F2
D6
E3
D7
E2
DVDD1
J4
A2
DVDD2
F1
DVDD3
J3
DVSS1
DVSS2
YMU787
U202
A0
G4
AVDD
G8
F8
AVSS
E6
MIDI_IRQ
C205
C224
0.1u
100p
1u
C226
2V8_MV
C211
47p
0.1u
C218
C228
0.1u
0.1u
C221
1V8_MV
0
R222
47n
C208
0
R223
1000p
C207
C233
NA
C220
1u
C223
0.1u
47p
C210
1u
VBAT
C227
C225
1u
R209
82K
C219
0.1u
13MHz
MIDI_HP_R
MIDI_HP_L
_MIDI_RST
DATA12
DATA13
DATA14
DATA15
I2S_WS
I2S_SCK
I2S_SDO
SPK_P
SPK_N
ADD00
_MIDI_CS
_RD
_MIDI_IRQ
_WR
DATA08
DATA09
DATA10
DATA11
Figure 3-21. YMU787 CIRCUIT DIAGRAM
Содержание KG320
Страница 1: ...Date May 2006 Issue 1 0 Service Manual Model KG320 Service Manual KG320 ...
Страница 3: ... 4 ...
Страница 20: ...3 TECHNICAL BRIEF 21 Figure 3 5 SKY77328 FUNCTIONAL BLOCK DIAGRAM ...
Страница 39: ...3 TECHNICAL BRIEF 40 3 7 CAMERA IC AIT811T U103 Figure 3 18 AIT811T APPLICATION BLOCKDIAGRAM ...
Страница 41: ...3 TECHNICAL BRIEF 42 3 8 MIDI IC YMU787 U202 Figure 3 20 YMU787 BLOCKDIAGRAM ...
Страница 59: ...4 2 TX Trouble 4 TROUBLE SHOOTING 60 SKY7477328 FEM 26Mhz OSCILLATOR SI4210 TEST POINT Figure 4 2 ...
Страница 72: ...4 TROUBLE SHOOTING 73 4 6 LCD Trouble AIT811T EMI FILTER CN102 TEST POINT Figure 4 6 ...
Страница 77: ...4 TROUBLE SHOOTING 78 Graph 4 10 a BLUE RST Graph 4 10 b DEBUG_TX RX Graph 4 10 c PCM_SYNCS TX RX USC0 ...
Страница 90: ...4 TROUBLE SHOOTING 91 4 14 Camera and Flash Trouble Camera Module U201 CN202 Figure 4 17 ...
Страница 99: ... 100 ...
Страница 107: ... 108 8 PCB LAYOUT ...
Страница 108: ... 109 8 PCB LAYOUT ...
Страница 109: ... 110 8 PCB LAYOUT ...
Страница 110: ... 111 8 PCB LAYOUT ...
Страница 111: ... 112 8 PCB LAYOUT ...
Страница 112: ... 113 8 PCB LAYOUT ...
Страница 113: ... 114 ...
Страница 121: ...10 STAND ALONE TEST 122 Figure 10 2 HW test setting Figure 10 3 Ramping profile ...
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Страница 147: ...Note ...
Страница 148: ...Note ...