LG KG320, Руководство по обслуживанию

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3. TECHNICAL BRIEF
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The Aero II transceiver can be configured in DCXO mode or VC-TCXO mode by the XMODE pin. To use
the transceiver in DCXO mode, the XMODE pin is tied high. The XTAL1 and XTAL2 pins are then
connected directly to the 26 MHz crystal. No additional components are required. The use of an external
VCTCXO module is also supported by tying the XMODE pin low. The VC-TCXO output should be input into
XTAL1, and XTAL2 should be tied low.
A buffer is available to provide a reference clock output from the XOUT pin to the baseband input. The
XOUT buffer is enabled when the XEN pin is set high, independent of the PDN pin. To achieve complete
powerdown during sleep, the XEN pin should be set low to disable the XOUT buffer. The XOUT buffer is
specified to drive a maximum load of 10 pF. The reference clock should be set to 13 MHz or 26 MHz by the
XDIV pin. When XDIV is tied low, XOUT is 26 MHz, and when it is tied high, XOUT is 13 MHz.
For a simple to follow methodology and detailed instructions on crystal selection, see "AN152: Selecting a
Crystal for Aero II Designs," or contact Silicon Laboratories Applications Support for assistance.
Figure. 3-4 DCXO BLOCK DIAGRAM