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LGE Internal Use Only

3. Technical brief

3.1.11 Bluetooth Interface

GD580 supports Bluetooth operation using ST’s STLC2593C Bluetooth module.

A. General Description

The Bluetooth interface utilizes the SPI interface for control signals going to and from the

Bluetooth module. The SPI is also used for data transmissions.
It uses the PCM interface for transmitting audio to and from the Bluetooth module.
The Bluetooth module uses both the 26 MHz master clock signal and the 32,768 kHz
low-frequency clock signal for internal timing within the Bluetooth module. The intention is
to use the low-frequency clock as a low-power timing provider and to use the 26 MHz as
a high precision timing reference used mainly by the Bluetooth radio during operation.
The clock request mechanism is used to minimize current consumption for the total system.
The intention is to use the CLKREQ signal to ask for the master clock when needed,
for example, when the Bluetooth radio is operating.

B. SPI Interface

The physical SPI interface is made up of 5 signals : clock, chip select, data in, data out and
interrupt. When the SPI mode is selected , these signals are available through the

BT_UART/BT_SPI and BT_HOST_WAKEUP pins.

The SPI interface is Master at the Host side, and Slave at the BT Controller side.
It is designed to work with the H4 and enhanced H4 protocol.

Also synchronous data packet transfer (sSCO) over HCI is supported.

The SPI data length and endianness are configurable.
The SPI interface can only operate in half duplex mode.

C. PCM Interface

The PCM interface is used to send audio to and from the Bluetooth module. The interface is a

synchronous interface using a PCM clock and a PCM sync signal for synchronization. Two data
signals are used for data, one in each direction.

The PCM clock signal operates at frequencies as high as 1 MHz. The word length of the audio

data can be 8 or 16 bits. Furthermore, the PCM interface has a function known as MP-PCM,
which is an addressing scheme, used to have more than two devices talking on the bus.
To add this function, the data pins have to be bi-directional. Additionally, the position of the
audio data relative to the frame sync pulse must be selectable. During the periods within a
frame that a device is not transmitting audio data, it must put both PCM data signals in a
high-impedance state to allow other devices access.

D. Master Clock and Clock Request Interface

The master clock (MCLK) is a 26 MHz signal used as the high precision clock signal for the

Bluetooth module. The signal can be switched on and off by the platform. The master clock
request (CLKREQ) is used by the Bluetooth module to ask for the master clock.
If the Bluetooth module asserts the signal high, it gets the master clock. The other
alternative for the Bluetooth module is to set the clock request output to high impedance
state, indicating that it does not need the master clock. The Bluetooth module receives the
master clock, if other parts of the chipset request it.