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LGE Internal Use Only
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes
(P1801
)
30P
HD LVDS wafe
r
51P
FHD LVDS wafe
r
(P1800
)
COMP2_L/R_IN
/A
V_CVBS_IN, C/Pr+
CK+/-, D0+/-, D1+/-, D2+/-_HDMI2
DDC_SCL/SDA_2, HDMI_CEC
Serial Flas
h
(8Mbit
)
IC1300
SPI_SCK/SDI/SDO/CS
System EEPROM
(256Kbit
)
IC10
4
I2C_SCL/SD
A
RXA0+
/-
~RXA4+
/-, RXACK+/
-
RXB0+
/-
~RXB4+
/-, RXBCK+/
-
SPK_R
SPK_
L
AMP_SCL/SD
A
AUD_MASTER_CLK,
AUD_LRCH,
AUD_LRCK,
AUD_SC
K
TA
S573
3
(IC5600
)
Connecto
r
(P4600
)
KEY1/2, LED_R, IR
REAR
HDMI1 (JK800)
SPDIF_OUT
SPDIF(Optic)
(JK1001)
SIDE
USB
(JK700)
HDMI2(MHL)
(JK801)
CK+/-, D0+/-, D1+/-, D2+/-,_HDMI4, DDC_SCL/SDA_4, HDMI_CEC
SIDE_USB_DM/DP
USB1_OCP/CTL
TPS65282
+5V_USB
MHL_CD_SENSE
AV
DD5V_MHL,MHL_OCP
CI Slot(P1900)
NAND FLASH
IC102 (1Gbit)
H27U1G8F2CTR
-B
C
PCM_A[0:7]
TC74LCX244FT
Buf
fer
TS
_D
AT
A[0:7]
PCM_DA
TA
[0
:7
]
COMPONENT
(JK2802)
5V_HDMI_4
PCM_A[8:14]
X
-t
al
24M
Main SOC
M1
A
-2
56MB
Built-i
n
(IC101)
TU_SCL
/ SDA
SIF
FE_TS_DA
TA
[8
]
CVBS
BLOCK DIAGRAM
Содержание 47LB5610
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