iPECS-MG Hardware Description and Installation Manual
Issue 1.1
DECT INSTALLATION
August, 2010
39
5.3.3 E1R2-PRIB (Primary Rate Interface Board)
The Primary Rate Interface Board (PRIB) provides one (1) PRI interface, or one (1) E1R2 interface.
The PRI interface supports 30 PCM bearer and 2 signaling channels for PRI or E1R2. The PRIB is
based on the interface described in ITU-T Recommendations G.704, G.703, and G.823. It covers
CEPT frame format that consist of 32 8-bit timeslots, a data rate of 2.048MHz. From the 32 timeslots
in a frame, 30 timeslots are defined as information channels, timeslots 1-15 and 17-31 that
correspond to telephone channels 1-30. The frame has a duration of 125
ų
sec and contains 32 Time
Slots (TS). Time Slot 0 is allocated to frame alignment sync, and Time Slot 16 is allocated to the
signaling channel; the other time slots are available for allocation to the B channel. The CEPT frame
has four signaling bits, A, B, C and D. Signaling bits for all 30 media channels are transmitted in
timeslot 16. The PRIB supports pulse dialing, DTMF dialing, and MFC-R2 register signaling (based
on ITU-T Recommendation Q.440-480).
Figure 5.3.3-1 E1-PRIB
CAUTION
For QSIG operation, check the mode setting and the pin assignments of RJ45 type connector according to the
mode of line, TE or NT.
NOTE:
iPECS-MG does not support daisy chained clocking for digital lines. The clock priority and
synchronization is controlled by Admin. For details, refer to PGM 301 of the iPECS-MG Admin Manual.
The default clock is assigned based on the board type, KSU, and slot as below.
- Board – PRIB>BRIB2/BRIB4>Internal Clock
- KSU – 1’st KSU>2’nd KSU>3’rd KSU
- Slot – Slot 1>Slot 2>…>Slot 18
5.3.3.1 Switch and LED Functions
Switch Functions
SWITCH
FUNCTION
REMARK
SW1
Mode Selection (OFF = PRI, ON = E1R2)
Default: PRI mode
SW3 Reset
switch
