Lattice Semiconductor POWR607, Руководство пользователя

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POWR607/6AT6 Evaluation Board
6. Slowly slide R16 towards the 0.0 V position.


Once the POWR607 voltage monitor detects the 2.5 V supply rail has dropped below a 2.5 V -5% threshold
value a supply fault will be triggered and the Reset CPU output signal is asserted. The CPU Reset LED (D2)
light indicates the reset condition. Note that the POWR607 watchdog timer is also disabled.
7. Slide R16 toward the 3.3 V position. Once the POWR607 voltage monitor detects that the 2.5 V rail is above a
threshold value of 2.5 V -5%, the Reset CPU output signal is released. The CPU Reset LED (D2) light goes out.
Run the Voltage Monitoring Demo
The voltage monitor demo illustrates how to access the 2-wire I
2
C slave interface of the ispPAC-POWR6AT6 device
to perform voltage level measurements. This is a popular means for a microcontroller/microprocessor to monitor
voltages and adjust the voltage profiles of the POWR6AT6 DC-DC converter margin output drivers. For more infor-
mation on POWR6AT6 end applications see AN6077,
Stable Operation of DC-DC Converters with Power Manager
Closed Loop Trim . This demo uses the ispPAC-POWR6AT6 I
2
C Utility software provided with PAC-Designer soft-
ware running on a host PC to emulate a processor’s interface to the POWR6AT6.
1. Modify the evaluation board to use the JTAG cable. See Adding Support for a JTAG Cable and/or I
2
C Communi-
cations in the Modifying the POWR607/6AT6 Evaluation Board section for more information.
2. Install PAC-Designer software.
3. From the PAC-Designer<ver>\Macro directory, run PowerManager_6AT6_I2C_Utility.exe. For more information
on the I
2
C Hardware Verification Utility software and operation see AN6067, ispPAC-POWR1220AT8 I2C Hard-
ware Verification Utility User’s Guide .
4. Set I
2
C Address = 6Ah
Download Demo Designs
The processor support demo is preprogrammed into the POWR607 Evaluation Board, however over time it is likely
your board will be modified. Lattice distributes source and programming files for demonstration designs compatible
with the POWR607 board.
To download demo designs:
1. Browse to the POWR607 Development Kit web page of the Lattice web site. Select the Demo Applications
download and save the file.
2. Extract the contents of “POWR607_DK_DemoSource.zip” to an accessible location on your hard drive.
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Two demo design files are unpacked.


Where:
Recompile a Demo Project with PAC-Designer
Use the procedure described below to recompile any of the demo projects for the POWR607 Evaluation Board.
1. Install PAC-Designer software
2. Download the demo source files from the POWR607 Development Kit web page.
3. Run PAC-Designer.
4. Open the <demo>.pac project file.
5. From the schematic block diagram, double-click the Sequence Controller block . The LogiBuilder interface
appears.
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Demo Files
Processor Support Demo Demo_POWR607_DK.pac
Voltage Monitoring with the POWR6AT6 Demo Demo_POWR6AT6_DK.pac