MachXO3-9400 Development Board
Evaluation Board User Guide
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.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
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FPGA-EB-02004-1.0
LEDs and Switches
This section describes the MachXO3-9400 Development Board LEDs and switches that can be used in demo and
customer designs.
7.1.
Four-Position DIP Switch
Four MachXO3 pins are connected to the four switches of SW1, as shown in the circuit design in
Figure 7.1
. The CTS
side actuated DIP switches are connected to logic level 0 when in the ON position as shown in
Figure 7.2
.
Figure 7.1. Four-Position DIP Switch Circuits
Figure 7.2. Four-Position DIP Switch Photograph
One side of each switch is connected to GPIOs within the VCCIO5 bank and pulled up through 4.7 kΩ resistors. The
other side is grounded. The designated pins are connected as shown in
Table 7.1
.
Table 7.1. Four-Position DIP Switch Signals
Signal Name
MachXO3 Ball
Location
SW1 DIP Switch
Position
4.7K Pull up Resistor
Logic Level at ON
Position
DIP_SW1
H5
1
R39
0
DIP_SW2
J5
2
R40
0
DIP_SW3
J4
3
R41
0
DIP_SW4
J3
4
R42
0
DIP_SW4
DIP_SW1
DIP_SW2
DIP_SW3
SW1
SW-DIP4
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
VCCIO5
R42
4.7K
R40
4.7K
R41
4.7K
R39
4.7K