Lattice Semiconductor MachXO, Руководство пользователя

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14
MachXO Standard Evaluation Board
Lattice Semiconductor Revisions 001 & 002 User’s Guide
Appendix A. PCB Schematic
Figure 8. MachXO Control and Programming Interfaces
A A
B B
C C
D D
E E
4
4
3
3
2
2
1
1
TD
O
_
C
L
K
CK
IN_
P
O
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CK
IN_
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TD
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C
L
K
VC
C
IO[
3.
.0
]
TM
S
_
C
L
K
LOC
K
#
CK
IN_
P
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CK
IN_
N
E
G
CL
K
_
O
U
T
[4
..0
]
V3.
3
GN
D
PLLI
N
_POS
PLLI
N
_N
EG
TC
K
CK
_
C
T
R
L
[7
..0
]
TD
O
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P
L
D
PB1
LED
[7.
.0
]
RJ4
5
[3
7
..0
]
LC
D
[38.
.0]
PR
OT
O[
99.
.0]
GSR
_
n
VAU
X
TD
I_
P
L
D
SW
IT
C
H
ES[
7
..
0]
HE
A
D
E
R
[3
3
..0
]
VC
OR
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GOE_PLD TM
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P
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DO
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V3.
3
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S
ize
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a
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ti
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11
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ize
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r
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v
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:
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h
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of
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o
c
>
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ch
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a
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ti
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rd
C
11
2
Ti
tl
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ize
Do
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n
t Nu
m
b
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r
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te
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S
h
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o
c
>
0
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ch
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a
lu
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ti
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B
o
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rd
C
11
2
Page 2
Page 3
Page 4
Page 5 Page 6
Page 7
Page 12
B1 Co
n
n
e
c
to
rs
TD
I_
P
L
D
TM
S
_
C
L
K
TC
K
TD
O
_
P
L
D
CK
IN_
P
O
S
CK
IN_
N
E
G
PLLI
N
_POS
PLLI
N
_
N
E
G
RJ4
5
_
IO
[7
..0
]
HE
A
D
E
R
[3
3
..0
]
TD
I_
C
L
K
TD
O
_
C
L
K
TM
S
_
P
L
D
GSR
_
n
GOE_PLD
DO
NE
_
n
PB1
B2 Po
w
e
r
VC
C
IO[
3.
.0
]
VC
OR
E
VAU
X
B3 Ma
ch
X
O
TD
O
TD
I
TM
S
TC
K
C
K
_C
T
R
L[
7.
.0
]
LOC
K
_n
CL
K
_
IN[4
..0
]
PR
OT
O[
99.
.0]
VC
OR
E
VAU
X
VC
C
IO[
3.
.0
]
PLLI
N
_
N
E
G
PLLI
N
_
POS
SW
IT
C
H
ES[
7
..
0]
LC
D
[38.
.0]
LED
[7.
.0
]
HE
A
D
E
R
[3
3
..0
]
RJ4
5
_
IO
[7
..0
]
GOE_PLD GSR
_
n
DO
NE
_
n
PB1
B4 P
rot
ot
y
p
e_
A
rea
PR
OT
O[
99.
.0]
VC
C
IO[
3.
.0
]
B5 Cl
o
c
k_
Co
n
tr
o
l
TD
O
TD
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TM
S
TC
K
C
K
_C
T
R
L[
7.
.0
]
CK
IN_
P
O
S
CK
IN_
N
E
G
CL
K
_
O
U
T
[4
..0
]
LOC
K
_n
B7 Me
ch
a
n
ic
a
l
B6 Input
_
Out
p
ut
LED
[7.
.0
]
SW
IT
C
H
ES[
7
..
0]
LC
D
[38.
.0]