Lattice Semiconductor LatticeXP2, Руководство пользователя

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LatticeXP2 Standard
Lattice Semiconductor Evaluation Board User’s Guide
The analog inputs of the device are connected to four test points. One of these test points is also connected to a
25K ohm discrete potentiometer. The potentiometer permits the input voltage level to vary between 0V to 3.3V at
one of the A/D inputs. The remaining three inputs are not connected to any passive or active components. These
test points can be used to inject signals meeting your own test requirements.
The digital I/O side of the device connects directly to the LatticeXP2 FPGA. Twelve of the I/O are the data-bus pins,
and seven are used to access the internal registers.
Table 15. A/D Connections
Digital to Analog Converter
The board also includes a Burr Brown DAC7617 12-bit Serial Input Digital to Analog converter.
The digital interface of the converter is a six-wire control set. Changes to the analog outputs are performed using
serial data. A change to an internal register requires 16 clock cycles.
The analog outputs from the D/A are connected directly to individual test points. There is no other logic connected
to the analog outputs.
The AIN2 input pin controls the range of the analog outputs. AIN2 is connected to a test-point adjacent to the A/D
converter described in the section above. AIN2 is also accessible via J20 pin 2. J20 is a 1x2 pin header that allows
the output of the digital potentiometer to be connected to the D/A VREFH input. In order for the digital potentiome-
ter to supply the reference voltage to the D/A converter, J20 must have pins 1-2 shunted. Regardless of the VREFH
source voltage, the D/A is able to output a voltage between VREFL (GND) and VREFH (AIN2) in a +/- 1/4096th
increment.
Table 16. D/A Connections
Digital Potentiometer
The evaluation board also provides a 10K ohm digital potentiometer. The potentiometer can be set to one of 128
positions between 0 ohm and 10K ohm. The potentiometer output voltage, which is present on J20 pin 1, can vary
from 0V to 3.3V. The potentiometer will be at the midpoint resistance at power up.
A/D Function LatticeXP2 I/O A/D Function LatticeXP2 I/O
AD0 A17 AD10 C19
AD1 B16 AD11 D19
AD2 A16 A0 C20
AD3 B15 A1 A21
AD4 A15 CLK B20
AD5 C16 BUSYn A20
AD6 C17 WRn A19
AD7 D17 CSn A18
AD8 C18 RDn B17
AD9 D18
Digital to Analog
Function LatticeXP2 I/O
Serial Data In C12
Clock D12
Chip Select A13
Load All A14
Load Register C14
Reset D14