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Programming Cables  
User Guide 

© 2009-2019 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at 

www.latticesemi.com/legal

 

All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. 

12 

 

FPGA-UG-02042-26.2 

7.

 

Connecting the Programming Cable 

The target board must be unpowered when connecting, disconnecting, or reconnecting the programming cable. Always 
connect the programming cable’s GND pin (black wire) before connecting any other JTAG pins. Failure to follow these 
procedures can result in damage to the target programmable device. 

8.

 

Programming Cable TRST Pin 

Connecting the board TRST pin to the cable TRST pin is not recommended. Instead, connect the board TRST pin to Vcc. 
If the board TRST pin is connected to the cable TRST pin, instruct ispVM/Diamond Programmer to drive the TRST pin 
high. 

To configure ispVM/Diamond Programmer to drive TRST pin high: 

 

Select the Options menu item. 

 

Select Cable and I/O Port Setup

 

Select the TRST/Reset Pin Connected checkbox. 

 

Select the Set High radio button. 

If the proper option is not selected, the TRST pin is driven low by ispVM/Diamond Programmer. Consequently, the 
BSCAN chain does not work because the chain is locked into RESET state. 

9.

 

Programming Cable ispEN Pin 

The following pins should be grounded: 

 

BSCAN pin of the 2000VE devices 

 

ENABLE pin of MACH4A3/5-128/64, MACH4A3/5-64/64 and MACH4A3/5-256/128 devices. 

However, you have the option of having the BSCAN and ENABLE pins driven by the ispEN pin from the cable. In this 
case, ispVM/Diamond Programmer must be configured to drive the ispEN pin low as follows: 

To configure ispVM/Diamond Programmer to drive ispEN pin low: 

 

Select the Options menu item. 

 

Select Cable and I/O Port Setup

 

Select the ispEN/BSCAN Pin Connected checkbox. 

 

Select the Set Low radio button. 

Each programming cable ships with two small connectors that help you keep the flywires organized. The following 
manufacturer and part number is one possible source for equivalent connectors: 

 

1 x 8 Connector (for example, Samtec SSQ-108-02-T-S) 

 

2 x 5 Connector (for example, Samtec SSQ-105-02-T-D) 

The programming cable flywire or headers are intended to connect to standard 100-mil spacing headers (pins spaced 
0.100 inch apart). Lattice recommends a header with length of 0.243 inches or 6.17 mm. Though, headers of other 
lengths may work equally well. 

Содержание HW-USBN-2B

Страница 1: ...Programming Cables User Guide FPGA UG 02042 26 2 May 2019...

Страница 2: ...faults and all risk associated with such information is entirely with Buyer Buyer shall not rely on any data and performance specifications or parameters provided herein Products sold by Lattice have...

Страница 3: ...information herein are subject to change without notice FPGA UG 02042 26 2 3 Contents 1 Features 5 2 Programming Cables 5 3 Programming Cable Pin Definitions 6 4 Programming Software 8 5 Target Board...

Страница 4: ...2A 7 Figure 3 3 Programming Cable In System Programming Interface for the PC HW DLN 3C and Equivalents 7 Figure 3 4 Programming Cable In System Programming Interface for the PC pDS4102 DL2 or pDS4102...

Страница 5: ...ion Figure 1 1 USB Cable HW USBN 2B 2 Programming Cables Lattice Programming Cable products are the hardware connection for in system programming of all Lattice devices After you complete your logic d...

Страница 6: ...power for VCC Note This may not be the same as a target device s VCCO plane TDO SO Test Data Output Input Used to shift data out via the IEEE1149 1 JTAG programming standard TDI SI Test Data Input Ou...

Страница 7: ...Yellow Green Purple Black White 61 25 pin Parallel Port Adapter HW7265 DL3 and HW7265 DL3A Grey Housing with RJ 45 Connector OtherCables are Labeled withPart Number To PC Figure 3 3 Programming Cable...

Страница 8: ...ice families that feature low power it is recommended to add a 500 resistor between VCCJ and GND during the programming interval when a USB programming cable is connected to a very low power board des...

Страница 9: ...N PROG na TRST OUTPUT VCC GND na Orange Brown Purple White Yellow Green Red Black Programming cable pin type Target Board Recommendation Output Input Output Output Output Input Input Output Input Inpu...

Страница 10: ...Output Input Input Output Input Input Output Output Output 4 7 k Pull Up 4 7k Pull Down Note 1 Note 2 Note 3 Note 3 Connect the programming cable wires above to the corresponding device or header pins...

Страница 11: ...al ICC 10 mA For devices that have a VCCJ pin the VCCJ must be connected to the cable s VCC For other devices connect the appropriate bank VCCIO to the cable s VCC A 0 1 F decoupling capacitor is requ...

Страница 12: ...x Select the Set High radio button If the proper option is not selected the TRST pin is driven low by ispVM Diamond Programmer Consequently the BSCAN chain does not work because the chain is locked in...

Страница 13: ...X X X X X 2 5 3 3 V Support X X X X X X X X X X 5 0 V Support X X X X X X X X X 2 x 5 Connector X X X X X X X 1 x 8 Connector X X X X X X X Flywire X X X X X X Lead free Construction X X X Available...

Страница 14: ...try to install its own drivers that may not work If you have attempted to connect the PC to the USB cable without first installing the appropriate drivers or have trouble communicating with the Latti...

Страница 15: ...marks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice FPGA UG 02042 26 2 15 Figure A 3 Update Driver Software Browse...

Страница 16: ...n herein are subject to change without notice 16 FPGA UG 02042 26 2 For Diamond installations browse to lscc diamond data vmdata drivers Click Next Select Install this Driver software anyway The syste...

Страница 17: ...trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice FPGA UG 02042 26 2 17 Figure A 8 Installation Completed...

Страница 18: ...C SDA value Changed ASC to L ASC10 Updated footnote 4 to include ispClock devices Adjusted trademarks Revision History Updated format Back cover Updated template Minor editorial changes Revision 26 1...

Страница 19: ...ispEN Enable PROG SN and its description revised Updated Figure 2 Programming Cable In System Programming Interface for the PC HW USBN 2B Programming Cable ispEN Pin In Table 4 Programming Cable Feat...

Страница 20: ...nt transferred to user s guide format Features Added Figure USB Cable HW USBN 2A Programming Flywire and Connection Reference Updated Recommended Cable Connections table for MachXO2 devices Target Boa...

Страница 21: ...www latticesemi com...

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