Standard event status register
7
6
5
4
3
2
1
0
PON
CME
EXE
QYE
OPC
AND
OR
AND
AND
AND
AND
7
6
5
4
3
2
1
0
8
4
2
1
Standard event
Status register
*ESR?
(
*ESR?
reads and
clears the register)
Standard event
Status enable register
*ESE, *ESE?
Not
used
Not
used
Not
used
PON
CME
EXE
QYE
OPC
Not
used
Not
used
Not
used
– Decimal
– Name
– Bit
– Bit
– Decimal
– Name
To event summary
bit (ESB) of status
byte register
(see FIGURE 6-1)
16
32
64
128
8
4
2
1
16
32
64
128
96
c
HAPTER
6:
Computer Interface Operation
Model 335 Temperature Controller
6.2.5.2 Operation Event Register Set
The Operation Event Register reports the interface related instrument events listed
below. Any or all of these events may be reported in the operation event summary bit
through the enable register (FIGURE 6-3). The Operation Event Enable command
(OPSTE) programs the enable register and the query command (OPSTE?) reads it.
OPSTR? reads and clears the Operation Event Register. OPST? reads the Operation
Condition register. The used bits of the Operation Event Register are described as fol-
lows:
D
Processor Communication Error (COM), Bit (7): this bit is set when the main pro-
cessor cannot communicate with the sensor input processor
D
Calibration Error (CAL), Bit (6): this bit is set if the instrument is not calibrated or
the calibration data has been corrupted
D
Autotune Done (ATUNE), Bit (5): this bit is set when the Autotuning algorithm is
NOT active
D
New Sensor Reading (NRDG), Bit (4): this bit is set when there is a new
sensor reading
D
Loop 1 Ramp Done (RAMP1), Bit (3): this bit is set when a loop 1 setpoint ramp
is completed
D
Loop 2 Ramp Done (RAMP2), Bit (2): this bit is set when a loop 2 setpoint ramp
is completed
D
Sensor Overload (OVLD), Bit (1): this bit is set when a sensor reading is in the over-
load condition
D
Alarming (ALARM), Bit (0): this bit is set when an input is in an alarming state, and
the Alarm Visible parameter is on
FIGURE 6-2