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Table 2: P2, S2, and S5 signal mapping to M2 pins
Header
Position
M2.#
Net
DVK Function
Switch
Position
P2
1
18
GND
P2
2
20
P0.10_NFC2
J16
S2
10
P2
3
22
P0.09_NFC1
J16
S2
9
P2
4
32
HOST_UART_RX
J12, FTDI USB J30
S2
8
P2
5
34
HOST_UART_TX
J12, FTDI USB J30
S2
7
P2
6
36
HOST_UART_CTS
J12, FTDI USB J30
S2
6
P2
7
38
HOST_UART_RTS
J12, FTDI USB J30
S2
5
P2
8
40
P0.30_AIN6
S2
4
P2
9
42
P1.10
S2
3
P2
10
44
TX_ON
S2
2
P2
11
46
GPS_LNA_EN
S2
1
P2
12
48
H
J7 HL7800 USB
S5
12
P2
13
50
HL_USB_D-
J7 HL7800 USB
S5
11
P2
14
52
LTE_UART0_RX
J11
S5
10
P2
15
54
LTE_UART0_RTS
J11
S5
9
P2
16
56
LTE_UART0_CTS
J11
S5
8
P2
17
58
LTE_UART0_TX
J11
S5
7
P2
18
60
P1.00_TRC0_SWO
S5
6
P2
19
62
P0.12_TRC1
S5
5
P2
20
64
P0.11_TRC2
S5
4
P2
21
66
P1.09_TRC3
S5
3
P2
22
68
P1.11_VGPIO
S5
2
P2
23
70
nPWR_ON
S5
1
P2
24
72, 74
VIN
Table 3: P3, S3, and S4 signal mapping to M2 pins
Header
Position
M2.#
Net
DVK Function
Switch
Position
P3
1
16
P0.31_AIN7
SW1
S4
1
P3
2
14
P0.25_UART1_DSR
S4
2
P3
3
12
P0.26
BME680 Sensor
S4
3
P3
4
10
P0.27
BME680 Sensor
S4
4
P3
5
8
1V8
S4
5
P3
6
6
HOST_UART_DTR
S4
6
P3
7
2, 4
VIN
P3
8
1
GND
J10 NRF USB
P3
9
3
NR
S4
7
P3
10
5
NRF_USB_D-
J10 NRF USB
S4
8
P3
11
7
GND
P3
12
9
USB_5V
J10 NRF USB
S4
9
P3
13
11
SWDCLK
S4
10
P3
14
13
SWDIO
S3
1
Содержание 453-00010-K1
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