mITX-APL
Doc. Rev. 1.2
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// 43
6.25.
PCIe x1 Connector (J17)
Figure 33: PCIe x1 Connector
Table 34: PCIe x1
Pin
Side B Connector
Side A Connector
#
Name
Description
Name
Description
1
+12v
+12 volt
power
PRSNT#1
Hot plug
presence
detect
2
+12v
+12 volt
power
+12v
+12 volt
power
3
+12v
+12 volt
power
+12v
+12 volt
power
4
GND
Ground
GND
Ground
5
SMCLK
SMBus clock JTAG2
TCK
6
SMDAT
SMBus data
JTAG3
TDI
7
GND
Ground
JTAG4
TDO
8
+3.3v
+3.3 volt
power
JTAG5
TMS
9
JTAG1
+TRST#
+3.3v
+3.3 volt
power
10
3.3Vaux
3.3v volt
power
+3.3v
+3.3 volt
power
11
WAKE#
Link
Reactivation
PWRGD
Power Good
Mechanical Key
12
RSVD
Reserved
GND
Ground
13
GND
Ground
Reference
Clock
14
HSOp(0)
Transmitter
Lane 0,
REFCLK-
Differential
pair
15
HSOn(0)
Differential
pair
GND
Ground
16
GND
Ground
HSIp(0)
Receiver
Lane 0,
17
PRSNT#2
Hotplug
detect
HSIn(0)
Differential
pair
A1