D R A F T — F O R I N
T E R N A L U S E O N L Y
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User Guide
CP3004-SA
3.3.13 Board ID Low-Byte Register (BIDL)
Note:
The Board ID High Byte Register is located at the address 0x288.
3.3.14 LED Configuration Register (LCFG)
The LED Configuration Register holds a series of bits defining the onboard configuration for the front
panel General Purpose LEDs.
Beside the configurable functions described above, LED3..0 fulfill also a basic debug function during
the power-up phase as long as the first access to Port 80 is processed. For further information on read-
ing the 8-bit uEFI BIOS POST Code, refer to section 2.7.1.2 General Purpose LEDs.
Table 36: Board ID Low-Byte Register (BIDL)
ADDRESS
0x28D
BIT
7
6
5
4
3
2
1
0
NAME
BIDL
ACCESS
R
RESET
0x30
BITFIELD
DESCRIPTION
7 - 0
BIDL
Board identification:
CP3004-SA:
0xB430
Table 37: LED Configuration Register (LCFG)
ADDRESS
0x290
BIT
7
6
5
4
3
2
1
0
NAME
Reserved
LCON
ACCESS
R
R/W
RESET
0000
0000
BITFIELD
DESCRIPTION
3 - 0
LCON
LED3..0 configuration:
0000 = POST Mode (LEDs build a binary vector to display the Port 80 value)
0001 = General Purpose Mode (LEDs are controlled via the LCTRL register)
0010 - 1111 = Reserved
