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T E R N A L U S E O N L Y
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User Guide
CP3004-SA
2.7.9 CompactPCI Connectors J1 and J2
The CP3004-SA provides two CompactPCI connectors, J1 and
J2, with the following functionality:
»
J1: 32-bit CompactPCI interface with PCI bus sig-
nals, arbitration, clock and power
»
J2: arbitration, clock and optionally rear I/O inter-
face functionality
The CP3004-SA is designed for a CompactPCI bus architecture
and the board is capable of driving up to seven CompactPCI
slots with individual arbitration and clock signals.
The CompactPCI standard is electrically identical to the PCI lo-
cal bus. However, these systems are enhanced to operate in
rugged industrial environments and to support multiple slots.
2.7.9.1 CompactPCI Connector Keying
CompactPCI backplane connectors support guide lugs to en-
sure a correct polarized mating (3.3 V or 5 V V(I/O) coding).
The CP3004-SA supports universal (3.3 V and 5 V) PCI V(I/O)
signaling voltages with one common termination resistor con-
figuration. Therefore, the CP3004-SA can be inserted in both,
3.3 V and 5 V CompactPCI systems and provides itself no guide
lug.
J2
J1
1
25
1
22
FEDCBAZ
Note:
Pinrow F: GND
Pinrow Z: NC
Figure 5: CPCI Connectors J1/J2
