Kontron 104-422-2I, Руководство пользователя

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104-422/485-2I User’s Guide
The third step of the initialization sequence is to set the Modem Control Register at Base Address
+4. This register controls functions on some cards. Bit 1 is the Request to Send (RTS) control bit.
This bit should be left low until transmission time. (Note: When operating in the automatic
RS485 mode, the state of this bit is not significant.) Bits 2 and 3 are user-designated outputs.
Bit 2 may be ignored on this card. Bit 3 is used to enable interrupts and should be set high if an
interrupt-driven receiver is to be used.
The final initialization step is to flush the receiver buffers. You do this with two reads from the
receiver buffer at Base A0. When done, the UART is ready to use.
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Reception
Reception can be handled in two ways: polling and interrupt-driven. When polling, reception is
accomplished by constantly reading the Line Status Register at Base A5. Bit 0 of this
register is set high whenever data are ready to be read from the chip. Polling is not effective at
high data rates above because the program cannot do anything else when it is polling or data
could be missed. The following code fragment implements a polling loop and uses a value of 13,
(ASCII carriage return) as an end-of-transmission marker:
do
{
while (!(inportb(BA5) & 1)); /*Wait until data ready*/
data[i++]= inportb(BASEADDR);
}
while (data[i]!=13); /*Reads the line until null character rec'd*/
Interrupt-driven communications should be used whenever possible and is required for high data
rates. Writing an interrupt-driven receiver is not much more complex than writing a polled
receiver but care should be taken when installing or removing your interrupt handler to avoid
writing the wrong interrupt, disabling the wrong interrupt, or turning interrupts off for too long
a period.