Kodak KAI-2001, Руководство пользователя, Страница: 6 / 30

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IMAGE SENSOR SOLUTIONS
ESD Bias Voltage
The RESET and HCLK gates on the KAI-2001,
KAI-2020, and KAI-2093 CCDs are protected from
ESD damage by internal circuitry. The ESD bias
voltage is set by a potentiometer, buffered by an
operational amplifier configured as a voltage
follower. The ESD bias voltage must be more
negative than any of the protected gates during
operation and powerup. In order to ensure these
conditions are met, diodes are connected external
to the CCD between the protected gates and
VESD, and between VSUB and VESD.
It is also recommended that during powerup of the
Timing Board and Imager Board, the VMINUS
supply is applied before, or simultaneously with,
the other power supplies. For more information,
refer to the appropriate CCD Image Sensor Device
Performance Specifications (References 1, 2 and
3).
CCD Image Sensor
This evaluation board supports the Kodak KAI-
2001, KAI-2020, and KAI-2093 Interline CCD
image sensors.
Emitter-Follower
The VOUT_LEFT_CCD and VOUT_RIGHT_CCD
video output signals are buffered using bipolar
junction transistors in the emitter-follower
configuration. These circuits also provide the
necessary 5mA current sink for the CCD output
circuits. The voltage gain of this stage is
approximately 0.96.
Line Drivers
The buffered VOUT_LEFT_CCD and
VOUT_RIGHT_CCD signals are AC-coupled and
driven from the Imager Board by operational
amplifiers in a non-inverting configuration. The
operational amplifiers are configured to have a
gain of 1.25, which yields an overall gain of 0.6
when driving the properly terminated 75
Ω
video
coaxial cabling from the SMB connector. This is
done to prevent overloading the AFE on the
Timing Board.
The video output of either channel may be
multiplexed to the VOUT_MUX output. The
multiplexer is controlled by the VIDEO_MUX
signal. This circuitry is for Kodak use only, and is
not enabled.