Kenwood TS-2000, Руководство по обслуживанию

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45
TS-2000/X
Pin name Type* Description
Host port interface (HPI) signal
HD0~ I/O/Z Parallel bi-directional data bus. The HPI data bus is used by the host device bus to exchange data with the HPI register.
HD7 It becomes high impedance when data is not output or OFF is low. The HPI data bus has a bus holder to reduce power
consumption of unused pins. When the DSP does not drive the HPI data bus, the bus holder retains the preceding
logic level. The HPI data bus holder is disabled on reset, and can be enabled/disabled through the HBH bit of the BSCR.
HCNTL0 I Control signal. HCNTL0 and HCNTL1 select one of three HPI registers for accessing the host. Control input includes
HCNTL1 an internal pull-up register that is enabled only when HPIENA = 0.
HBIL I Byte recognition signal. HBIL recognizes the first or second byte to be transmitted. HBIL input includes an internal
pull-up register that is enabled only when HPIENA = 0.
HCS I Chip select signal. HCS selects HPI input and is driven to low during access. The chip select signal includes an
internal pull-up register that is enabled only when HPIENA = 0.
HDS1 I Data strobe signal. HDS1 and HDS2 are driven by host read and write strobe for the control signal.
HDS2 There is an internal pull-up register that is enabled only when HPIENA = 0.
HAS I Address strobe signal. HAS is necessary for the host with multiplexed address and data pins to latch an address with
the HPIA register. There is an internal pull-up register that is enabled only when HPIENA = 0.
HR/W I Read/write. HR/W controls HPI transfer direction. There is an internal pull-up register that is enabled only when HPIENA = 0.
HRDY O/Z Ready signal. Ready output notifies the host that the HPI is ready to transmit. It becomes high impedance when the
OFF signal is low.
HINT O/Z Host interrupt signal. This output is used to interrupt the host. When the DSP is reset, it goes high. HINT can be
used as timer 1 output (TOUT1) when HPI is disabled. It becomes high impedance when the OFF signal is low.
HPIENA I HPI module select signal. To enable HPI, this pin must be made high on reset. The internal pulldown register is
always active and the HPIENA pin is sampled at a rising edge of RS. When HPIENA is open or low on reset, the HPI
module is disabled. The HPIENA pin is not affected until the DSP is reset.
Power supply pins
CVDD S +VDD. CPU core 1.8V power supply.
DVDD S +VDD. I/O pin 3.3V power supply.
Vss S Ground.
Test pins
TCK I IEEE standard 1149.1 test clock. Normally, clock input with a duty ratio of 50%. When the input signal (TMS, TDI)
changes on the TAP (test access port), it is loaded into the TAP controller, instruction register, and test data register
at a rising edge of TCK. The TAP output signal (TDO) data changes at a falling edge of TCK.
TDI I IEEE standard 1149.1 test data input pin with an internal pull-up device. TDI data is loaded into a register (instruction
or data) at a rising edge of TCK.
TDO O/Z IEEE standard 1149.1 test data output pin. The contents of a register (instruction or data) are output from TDO at a
falling edge of TCK. TDO is high impedance except during data scan processing. It also becomes high impedance
when the OFF signal is low.
TMS I IEEE standard 1149.1 test mode select pin with an internal pull-up device. The serial control input is loaded into the
TAP controller at a rising edge of TCK.
TRST I IEEE standard 1149.1 test reset pin with internal pulldown device. When it is high, the device enters the IEEE
standard 1149.1 scan system control mode. If it is low or not connected, the IEEE standard 1149.1 signal is ignored.
EMU0 I/O/Z Emulator pin 0. When the TRST pin is low, this pin must be high . When the TRST pin is high, this pin is used as an
interrupt for the emulator system and becomes an I/O for the IEEE standard 1149.1 scan.
EMU1/ I/O/Z Emulator 1 pin/output control pin. When the TRST pin is high, this pin is used as an interrupt for the emulator system
OFF and becomes an I/O for the IEEE standard 1149.1 scan system. When the TRST pin is low, all outputs are high
impedance. Note that the OFF pin is exclusive for test and emulation. (They cannot be executed at the same time.)
OFF conditions are as follows; TRST = L, EMU0 = H, EMU1/OFF = L.
* I = Input, O = Output, Z = High impedance, S = Supply
SEMICONDUCTOR DATA