Kenwood TS-2000, Руководство по обслуживанию

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18
TS-2000/X
The third IF signal is input to the third transmit mixer
(Q44, 45).
A GaAs FET is used to obtain the satisfactory inter-
modulation characteristics. VR3 adjusts the second gate
voltage to maximize the gain. VR2 adjusts the balance of
the source current of two FETs and prevents the generation
of spurious components by minimizing IF output leakage. It
also adjusts the leakage of the IF signal (68.985MHz) to the
minimum during 50MHz band transmission.
The signal with the target frequency passes through the
BPF shared by the receiver section to eliminate spurious
components. The transmitter circuit is separated from the
receiver circuit to implement satellite communication, but
only this BPF is shared to prevent generation of spurious
components.
Finally, the signal is amplified to a sufficient level (ap-
proximately 0dBm) by the broadband amplifier and supplied
to the final section. Q43 is a power MOS FET and provides
an output of approximately 20dBm when the ALC is inac-
tive.
HBPF
D76
VR2
VR3
L98~100
L96
L95
L97
Q44
Q45
TX-RX 1 (X57-605 A/9)
D26
BPF
1.705~2.5MHz
BPF
2.5~4.1MHz
BPF
4.1~6.9MHz
BPF
6.9~7.5MHz
BPF
7.5~10.5MHz
BPF
10.5~13.9MHz
BPF
13.9~14.5MHz
BPF
14.5~21.5MHz
BPF
21.5~30.0MHz
BPF
30~49, 54~60MHz
BPF
49~54MHz
Q43
HFTX
RF HPF
Fig. 12
■
ALC
The progressive and reflected wave signals detected by
the final section in each band enters the TX-RX1 unit (X57-
605) and is synthesized by a diode. It is synthesized simply
because no signal is transmitted in multiple bands at the
same time.
When the progressive signal voltage is input, it is divided
by a resistor, and enters the differential amplifier composed
of Q73 and Q74. When the voltage increases, the emitter
voltage rises, the base current of Q74 decreases, and the
collector voltage of Q74 also rises. When the voltage ex-
ceeds the base emitter voltage plus the emitter voltage (ap-
proximately 2.4V) of Q76, the base current of Q76 begins to
flow and the voltage of the collector to which the ALC time
constant CR is connected decreases. This collector voltage
is buffered by Q78, the voltage is shifted by D108, and
matched with the keying control voltage by Q79 and D111
to produce the ALC voltage. When the ALC voltage (2.7V
when inactive) decreases, the second gate voltage of the IF
amplifier (Q49) decreases and the gain lowers.
During AM transmission, Q75 turns on approximately
20ms after transmission, and the ALC voltage is controlled
by the average power. The voltage output from the DAC
(IC14) is applied to the base voltage of Q74, which is the
reference voltage of the ALC. This DAC (IC14) is controlled
by the adjustment value (POC) from the main microcom-
puter. In addition, the input voltage of the DAC fluctuates
according to the power supply voltage and the output drops
when the voltage is reduced.
■
SWR protection
The reflected wave detection signal is divided by the
DAC (IC14) and input to the base of Q77. When this voltage
increase, the collector current of Q77 increases and output
power is limited.
■
Meter voltage
The progressive wave voltage is calculated as the power
meter voltage, the reflected wave voltage is calculated as
the progressive wave voltage and its value is input as the
SWR meter voltage, and the ALC voltage is input as the ALC
meter voltage. These voltages are input into the A/D con-
verter of the main microcomputer.
■
Packet signal
The control unit contains a TNC and a changeover switch
circuit that enables data signals to input from the ACC2 con-
nector. (See the block diagram)
The 1200bps signal is processed by the DSP in the same
way as for audio signals, but the 9600bps signal is input di-
rectly to the FM modulator without passing through the
DSP.
CIRCUIT DESCRIPTION