TM-271A/271E
6
■
Decode
• CTCSS/DCS
The signal (W/NO (EVOL2)) goes to DTMF IN (pin 95) of
CPU (IC101). The CTCSS/DCS signal will pass through the
low-pass filters in the CPU (IC101) and be decoded within the
CPU (IC101). The DTMF signal will be decoded within the
CPU (IC101).
■
D/A Converter
The D/A converter (IC161) is used to adjust MO modula-
tion, AF volume, TV voltage, FC reference voltage, and PC
POWER CONTROL voltage level.
Adjustment values are sent from the CPU as serial data.
The D/A converter has a resolution of 256 and the following
relationship is valid:
D/A output = (Vin – VDAref) / 256 x n + VDAref
Vin: Analog input
VDAref: D/A reference voltage
n: Serial data value from the microprocessor (CPU)
Power Supply Circuit
When the power switch on the display unit is pressed, the
power port on the display unit which is connected port 17
(POWER), goes low, then port 82 (SBC) goes high, Q32 turns
on, SB SW (Q31) turns on and power (SB) is supplied to the
radio.
When the DC power supplied to the radio, the voltage
regulator IC (IC33) supply into the CPU VDD and reset voltage
detect IC (IC34). IC34 will generate signal (RESET) in to the
reset terminal on the CPU (IC101) to carry out a power ON
reset. If DC power is less than about 9.5V, the radio is unable
to power on.
When the DC power voltage deceases from normal volt-
age, the INT voltage detector IC (IC35) will set to high on CPU
port 18 (INT) if B line will became less than about 9.5V. Then
CPU send to EEPROM (IC66) the backup data and go into
STOP mode.
This circuit has an overvoltage protection circuit. If a DC
voltage of 18V or higher is applied to the base of Q61, this
voltage turns Q61 on and will set to high on CPU port 18
(INT). Then CPU send to EEPROM (IC66) the backup data
and go into stop mode. (See Fig. 16.)
IC101
CPU
DTMF IN
W/NO (EVOL2)
95
Q71
SW
Q31
SW
Q32
SW
Q61
SW
IC33
AVR
D61
D62
B
IC34
RST
SBC
IGN
R77
R76
R39
R40
INT
5M
BATT
IC101
CPU
POWER
SW
POWER
RESET
5M
IC35
INT
SB
IGN
Fig. 15
Decode
Fig. 16
Power supply circuit
CIRCUIT DESCRIPTION
Data Terminal and Peripheral Circuits
CN2 (data terminal) is the data communications terminal
on the TX/RX PCB. It handles transmission control, data in-
put/output, and squelch signals.
There are two data communications modes : 9600bps
mode and 1200bps mode. Unlike with 1200bps AFSK, with
this type of high-speed modulation, frequency modulation is
carried out after the digital base band signals (rectangular
wave) are passed through a band limiting filter. For 9600bps
GMSK for example, compared to 4800Hz signals (nearly sine
wave signals passed through a filter), these signals have a
hissing sound like digital modulation when listened to by ear.
Different types of modulation, such as GMSK is distin-
guished by the type of band limiting filter.
Pin
Pin
Specification
No.
Name
1
PKD
bps switching
1200bps
9600bps
Modulation input
400mVp-p
4Vp-p
Frequency shift
3
±
0.5kHz
2.2
±
0.5kHz
4
PR9
Output level 500mVp-p/10k
Ω
Always output during reception
5
PR1
Output level 500mVp-p/10k
Ω
Not output when squelch off
Table 4
Data terminal input/output level
