TK-2217
24
CIRCUIT DESCRIPTION /
电路说明
6) Squelch
Part of the AF signal from the IC enters the FM IC (IC201)
again, and the noise component is amplified and rectified
by a filter and an amplifier to produce a DC voltage
corresponding to the noise level.
The DC signal from the FM IC goes to the analog port of
the microprocessor (IC405). IC405 determines whether to
output sounds from the speaker by checking whether the
input voltage is higher or lower than the preset value.
To output sounds from the speaker, IC405 sends a high
signal to the SP MUTE line and turns IC302 on through
Q303,Q304,Q305,Q306 and Q316. (See Fig. 4)
7) Receive Signaling
(1) QT/DQT
The output signal from FM IC (IC201) enters the
microprocessor (IC405) through IC301. IC405 determines
whether the QT or DQT matches the preset value, and
controls the SP MUTE and the speaker output sounds
according to the squelch results.
(2) MSK (Fleet Sync)
The MSK input signal from the FM IC goes to pin 31 of
IC301. The signal is demodulated by MSK demodulator in
IC301. The demodulated data goes to the CPU for
processing.
(3) DTMF
The DTMF input signal from the FM IC (IC201) goes to
IC301. The decoded information is then processed by the
CPU.
3. PLL Frequency Synthesizer
The PLL circuit generates the first local oscillator signal for
reception and the RF signal for transmission.
1) PLL
The frequency step of the PLL circuit is 2.5,5,6.25 or 7.5kHz.
A 12.8MHz reference oscillator signal is divided at IC1 by a
fixed counter to produce an oscillator (VCO) output signal
which is buffer amplified by Q2 then divided in IC1 by a
programmable counter. The divided signal is compared in
phase with the 5 or 6.25kHz reference signal from the phase
comparator in IC1. The output signal from the phase
comparator is filtered through a low-pass filter and passed
to the VCO to control the oscillator frequency. (See Fig. 5)
RECEIVE SIGNALING
RECEIVE SIGNALING
SP
Q306,316
SW
IF Amp
FM IF IC201
IC301
IC302
AF PA
IC405
Q303,304,305
SW
QT/DQT
DTMF
CLK,DATA,
STD,LOADN
SIGNAL
AF CONT
QT/DQT IN
BUSY
CPU
AQUA-L
Fig. 4 AF amplifier and squelch /
图 4 AF 放大器和静噪
6) 静噪
FM IC (IC201) 输出的 AF 信号的一部分再进入 IC，噪声成份
通过滤波器和放大器进行放大和修正，生成与噪声电平相应
的 DC 电压。
DC 信号通过 FM IC 被送到微处理器的模拟端口 (IC405)。
IC405 通过检测输入的电压是高于还是低于预设值来决定是
否从扬声器输出声音。由扬声器输出声音时， IC405发送高电
平信号给SP MUTE线，通过Q303，Q304，Q305，Q306和Q316
打开 IC302。（见图 4）。
7) 接收信令
(1) QT/DQT
FM IC (IC201) 输出的信号通过 IC301 进入微处理器 (IC405)。
IC405 测定 QT 或 DQT 是否与设置的值匹配，并根据此结
果来控制 SP MUTE 和扬声器输出声音。
(2) MSK ( Fleet Sync)
来自FM IC的MSK输入信号送到IC301的31脚。信号在IC301
上的 MSK 调解器中进行调解。被解调的数据送到 CPU 进行
处理。
(3) DTMF
FM IC (IC201) 的 DTMF 输出信号送到 IC301。解码数据由
CPU 处理。
3. PLL 频率合成
PLL 电路产生用于接收的第一本地振荡信号和发射用的 RF
信号。
1) PLL
PLL 电路的频率步进是 2.5, 5, 6.25 或 7.5kHz。
12.8MHz 的参考振荡信号在 IC1 中被一个固定计数器分频。
振荡器 (VCO) 的输出信号由 Q2 缓冲放大 , 然后在 IC1 中被
一个可编程双模块计数器分频。分频的信号在 IC1 的相位比
较器中进行比较。生成的信号通过一个低通滤波器滤波后传
送到 VCO 控制振荡器频率。（见图 5）
