FGZ000UF2
9
●
GRAPHIC
µ
-com : IC12 (X25 : ELECTRIC UNIT)
Pin No.
Pin Name
I/O
Application
Processing Operation Description
1~5
NC
-
Not connected
L-output
6
VSS
I
Ground input
7
A0
-
Not connected
L-output
8~11
A1~A4
O
Address bus output
H, L-output
12
VCC
-
Power supply input
13
A5
O
Address bus output
H, L-output
14
VSS
-
Ground input
15~25
A6~A16
O
Address bus output
H, L-output
26
VCC
-
Power supply input
27
A17
O
Address bus output
H, L-output
28
VSS
-
Ground input
29,30
NC
-
Not connected
L-output
31
RAS
O
DRAM row address strobe output
L : Row address strobe
32
CASL
O
DRAM low-side column address strobe output
L : Column address strobe
33
NC
-
Not connected
L-output
34
CASH
O
DRAM upper-side column address strobe input
L : Column address strobe
35
VSS
-
Ground input
36
RDWR
O
DRAM write strobe output
H : Read, L : Write
37~39
A18~A20
O
Address bus output
H, L-output
40
VCC
-
Power supply input
41
A21
-
Not connected
Not used since upper address is not used.
L-output
42
VSS
-
Ground input
43
RD
O
External device read strobe output
L : Read strobe
44
NC
-
Not used
45
SH VMUTE
-
Not connected
L-output
46
NC
-
Not connected
L-output
47
WRH
O
External device upper-side write output
L : Write
48
WRL
O
External device lower-side write output
L : Write
49
CS1
O
Chip select output (Q2i internal register)
L : Chip select
50
CS0
O
Chip select output (Flash ROM)
L : Chip select
51~53
NC
-
Not connected
L-output
54
CS2
O
Chip select outpout (Q2i UGM)
L : Chip select
55
VSS
-
Ground input
56
ROM RESET
-
Not connected
L-output
MICROCOMPUTER’S TERMINAL DESCRIPTION
Pin No.
Pin Name
I/O
Application
Processing Operation Description
141
NC
-
Not connected
Not used
142
VREF
I
Reference voltage input
VCC5V
143
AVCC
-
Power supply input
VCC5V
144
NAVI-RXD
I
Normal NAVI communication reception data input
H, L input