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32
Input Capture
This option is also always available. When the Edge selected (rising or falling edge) is detected
on ICP pin, the current value of Timer 1 is copied to the Input Capture Register - ICR1. The Input
Capture flag is also set and an interrupt can be generated - Timer 1 Capture.
The other two options are
PWM Mode
and
Output Compare Mode
and these are mutually
exclusive. When output Compare is selected, PWM mode becomes disabled, and vice-versa.
Both of these options can use a Counter or Timer Source and can operate with or without Input
Capture.
PWM Mode
This option makes Timer 1 and the Output Compare Registers (OCR1A and OCR1B) act as a
Pulse Width Modulator. The resolution of the output can be 8, 9 or 10-bit depending on the choice
selected in the
Resolution
box.
The Timer counts from $0000 to TOP value and back to zero. TOP value is either $FF, $1FF or
$3FF depending on the resolution (8, 9 or 10-bit). The default value is TOP, but this value will
give either a constant low or a constant high level on the output pins depending on the settings of
OutA and OutB. Therefore you must enter a value in
MatchA
and
MatchB
which is less than
TOP in order to get the modulation on OC1A and OC1B pins respectively.
So, in PWM Mode, Timer 1 counts from $0000 to TOP and down again. This means that there
will be two compare values for OCR1A and OCR1B every cycle - going up and then down - when
the Match values correspond to Timer 1 value. OutA and OutB set the output options when these
matches occur:
Disconnected - No effect on output pins
Non-inverted - Cleared on upcount, set on downcount
Inverted - Set on upcount, cleared on downcount
Output Compare
The other option with Timer 1 is Output Compare Mode. Unlike PWM mode, all 16 bits of the
Output Compare Registers OCR1AL/H and OCR1BL/H are used. These values are set in the
CompareA Value
and
CompareB Value
fields.
Whenever the value of Timer 1 matches these values, the effect on the output pins (OC1A, OC1B)
is specified by the
OutputA
and
OutputB
radio buttons.
Clear Timer
clears Timer/Counter1 to $0000 in the clock cycle after a compareA match. If this is
not checked, timer/Counter1 will continue to count, unless cleared elsewhere.
.
Содержание STK300
Страница 1: ...Page 1 STK300 USER MANUAL Published by KANDA SYSTEMS LTD www kanda com...
Страница 33: ...Page 33 Timer 2 Window Timer 2 is an 8 bit Timer Counter Standard Operation...
Страница 42: ...Page 42 Port F Window Port F is input only Any bits not used by the ADC can be used for standard input...
Страница 45: ...Page 45...