XV-S40BK/XV-S42SL/XV-S45GD/XV-S30BK
1-23
CLK
ADO
LCKE
CLK
CKE
CS
RAS
CAS
WE
L(U)DQM
LRAS LCBR
LWE
LCAS
LWCBR
LDQM
LWE
LDQM
DQI
LCBR
LRAS
Bank Select
Address Register
Ro
w Decoder
Col.Buff
e
r
Output Buff
er
I/O Control
Ro
w Buff
er
Refresh Counter
Data input register
512K x 16
512K x 16
Sense AMP
Column decoder
Latency & burst length
Programming register
Timing register
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
VDD
DQ0
DQ1
VSSQ
DQ2
DQ3
VDDQ
DQ4
DQ5
VSSQ
DQ6
DQ7
VDDQ
LDQM
WE
CAS
RAS
CS
A11
A10
A0
A1
A2
A3
VDD
VSS
DQ15
DQ14
VSSQ
DQ13
DQ12
VDDQ
DQ11
DQ10
VSSQ
DQ9
DQ8
VDDQ
NC
UDQM
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
VSS
1.Terminal Layout
2.Block Diagram
3.Pin Function
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
VDD
DQ0
DQ1
VSSQ
DQ2
DQ3
VDDQ
DQ4
DQ5
VSSQ
DQ6
DQ7
VDDQ
LDQM
WE
CAS
RAS
CS
A11
A10
A0
A1
A2
A3
VDD
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
VSS
A4
A5
A6
A7
A8
A9
NC
CKE
CLK
UDOM
NC
VDDQ
DQ8
DQ9
VSSQ
DQ10
DQ11
VDDQ
DQ12
DQ13
VSSQ
DQ14
DQ15
VSS
Power Supply
Data Input/Output
Data Input/Output
To Ground
Data Input/Output
Data Input/Output
Power Supply
Data Input/Output
Data Input/Output
To Ground
Data Input/Output
Data Input/Output
Power Supply
Data Input/Mask Output
Write Enable
Column Address Strobe
Raw Address Strobe
Chip Select
Address
Address
Address
Address
Address
Address
Power Supply
To Ground
Address
Address
Address
Address
Address
Address
Non Connection
Clock Enable
System Clock
Data Input/Mask Output
Non Connection
Power Supply
Data Input/Output
Data Input/Output
To Ground
Data Input/Output
Data Input/Output
Power Supply
Data Input/Output
Data Input/Output
To Ground
Data Input/Output
Data Input/Output
To Ground
Pin No. Symbol Function
Pin No. Symbol Function
KM416S1120DT-G8(IC504,IC505):DRAM