1-8 (No.YA229)
2.4.2 MAIN CPU PIN FUNCTION [IC7601 : DIGITAL SIGNAL PWB ASS'Y / RECEIVER UNIT]
Pin
Pin name
I/O
Function
Pin
Pin name
I/O
Function
1
VHOLD1
I
Data slice for main screen closed caption
51
NC
O
Not used
2
HFLT1
I/O LPF for main screen closed caption video input
52
NC
O
Not used
3
NC
O
Not used
53
NC
O
Not used
4
NC
O
Not used
54
NC
O
Not used
5
DIGR0
O
R [0] for OSD
55
NC
O
Not used
6
TB1in
I
AC power for timer clock
56
NC
O
Not used
7
REMO
I
Remote control
57
NC
O
Not used
8
BYTE
I
Data bus width select [L = 16bit (fixed)]
58
NC
O
Not used
9
CNVss
I
CPU programming mode select [Normal = L]
59
NC
O
Not used
10
DIGG0
O
G [0] for OSD
60
NC
O
Not used
11
DIGB0
O
B [0] for OSD
61
NC
O
Not used
12
RESET
I
Reset for main CPU [Reset = L]
62
HSYNC
I
H. sync for OSD
13
Xout
O
System clock osillation (crystal) : 16MHz
63
NC
O
Not used
14
Vss
-
GND
64
VSYNC
I
V. sync for OSD
15
Xin
I
System clock osillation (crystal) : 16MHz
65
NC
O
Not used
16
VccI
I
3.3V stand-by power supply
66
NC
O
Not used
17
OSC1
I
Clock for OSD
67
NC
O
Not used
18
OSC2
O
Not used : Clock for OSD
68
NC
O
Not used
19
INT1
I
AV COMPULINK control
69
NC
O
Not used
20
INT0
I
Request for sub(chassis) CPU communication (serial data)
70
NC
O
Not used
21
OUT1
O
Ys (blanking) for OSD
71
NC
O
Not used
22
OUT2
O
YM (transparence) for OSD
72
NC
O
Not used
23
NC
O
Not used
73
NC
O
Not used
24
NC
O
Not used
74
NC
O
Not used
25
NC
O
Not used
75
NC
O
Not used
26
NC
O
Not used
76
NC
O
Not used
27
CTA2/RTS2
O
Not used : Digital tuner control
77
NC
O
Not used
28
CLK2
O
Not used : Digital tuner control
78
NC
O
Not used
29
RxD2
I
Not used : Digital tuner control
79
NC
O
Not used
30
TxD2
O
Not used : Digital tuner control
80
NC
O
Not used
31
SDA2
I/O Not used
81
NC
O
Not used
32
DIGR1
O
R [1] for OSD
82
NC
O
Not used
33
DIGG1
O
G [1] for OSD
83
NC
O
Not used
34
DIGB1
O
B [1] for OSD
84
WAKE
O
Reset for sub(chassis) CPU
35
TxD0
I
Data receive (serial) for external programming
85
CARD_DET
I
Not used : Card detection for ATSC digital tuner
36
RxD0
O
Data transmission (serial) for external programming
86
POWER_SW
I
Not used : Power switch (mechanical) detection
37
CLK0
I
Clock for external programming
87
NC
I/O Data for Inter IC (serial) bus control : memory
38
RTS0
O
Busy for external programming [Operation = H]
88
NC
O
Clock for Inter IC (serial) bus control : memory
39
P5.7
I
Not used
89
DIGR2
O
R [2] for OSD
40
P5.6
O
Not used
90
DIGG2
O
G [2] for OSD
41
HOLD
I
CPU programming mode select [Normal = H]
91
DIGB2
O
B [2] for OSD
42
P5.4
O
Not used
92
NC
O
Not used
43
P5.3
O
Not used
93
KEY2
I
Key scan data for front control button (MENU/CH+/CH-) KEY2
44
P5.2
O
Not used
94
KEY1
I
Key scan data for front control button (VOL+/VOL-) KEY1
45
P5.1
O
Not used
95
VHOLD2
I
Data slice for sub screen closed caption
46
WR
O
CPU programming mode select [Normal = L]
96
HLF2
I/O LPF for sub screen closed caption video input
47
P4.7
O
Data transmission for sub(chassis) CPU communication (serial)
97
CVIN2
I
Video(Y) for sub screen closed caption
48
P4.6
I
Data receive for sub(chassis) CPU communication (serial)
98
TVSETB
I
Test terminal [L Fixed]
49
P4.5
I
Clock for sub(chassis) CPU communication (serial)
99
VCCE
I
5V stand-by power supply
50
P4.4
O
Not used
100
CVIN1
I
Video(Y) for main screen closed caption
Содержание PD-Z50DX4
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