1-50 (No.49839)
4.23 TMP91CW12AF4R31 (IC501) : CPU
• Pin Layout
• Pin function
1
25
75
51
100
26
76
50
Pin No
Symbol
I/O
Function
1
VREFL
-
Connect to ground
2
AVSS
-
Connect to ground
3
AVCC
-
Connect to 3.3V
4
CDON
O CD power supply (3.3V) control
5
CDREQ
O CD mechanism power supply request
6
CDMUTE
O ICD mute
7
MP3RESET
O CD MP3 reset
8
MP3STB
O CD MP3 standby (H: Standby)
9 to 11
NC
-
Not connect
12
SW2
I
CD mechanism SW2
13
REST
I
CD mechanism rest SW
14 to 17
NC
-
Not connect
18
LCDCE/SO
O Chip enable to LCD driver (Not connect)
19
LCDDA/SI
O Data to LCD driver (Not connect)
20
LCDCK
O Clock to LCD driver (Not connect)
21
BUSS0
I
JVC BUS data
22
BUSSI
O JVC BUS data
23
BUSSCK
I/O JVC BUS clock
24
AM0
Pull up to 3.3V
25
DVCC
-
Connect to 3.3V
26
X2
Crystal oscillator (24.576MHz)
27
DVSS
-
Connect to ground
28
X1
Crystal oscillator (24.576MHz)
29
AM1
Pull up to 3.3V
30
RESET
I
Reset
31,32
NC
-
Not connect
33
EMU0
-
Not connect
34
EMU1
-
Not connect
35
B.DET
I
Back up power supply detection (H: STOP mode)
36
SW1
I
CD mechanism SW1
37
P.DET
I
Main power off detection (H: HALT mode)
38 to 42
NC
-
Not connect
43
ALE
-
Not connect
44
BUS3
I/O CD DSP data3
45
BUS2
I/O CD DSP data2
46
BUS1
I/O CD DSP data1
47
BUS0
I/O CD DSP data0
48
BUCK
O Clock to CD DSP data
Содержание KD-LH3105
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