JVC CA-MXK50R, Руководство по обслуживанию

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1-35
MX-K50R
Pin No.
1
2
3
to
10
11
12
13
14
15
16
17
18
19
to
22
23
to
26
27
28
29
30
to
36
37
to
45
46
47
to
50
51
52
to
63
64
to
71
72
73
to
80
81
to
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Symbol
P16/BUZ
P17/PWM0
P30
to
P37
P70/INT0
RES
XT1/P74
XT2/P75
VSS1
CF1
CF2
VDD1
P80/AN0
to
P83/AN3
P84/AN4
to
P87/AN7
P71/INT1
P72/INT2/T0I
P72/INT3/T0I
S0/T0
to
S6/T6
S7/T7
to
S15/T15
VDD3
S16/PC0
to
P19/PC3
VP
S20/PC4
to
S31/PD7
S32/PE0
to
S39/PE7
VDD4
S40/PF0
to
S47/PF7
S48/PG0
to
S51/PG3
P00
P01
P02
P03
VSS2
VDD2
P04
P05
P06
P07
P10/SO0
P11/SI0/SB0
P12/SCK0
P13/SO1
P14/SI1/SB1
P15/SCK1
I/O
I/O
I/O
I/O
I/O
I
I
I
-
I
O
-
I
O
I
I
O
O
-
I/O
-
I/O
I/O
-
I/O
I/O
I/O
-
-
I/O
I/O
Function
Buzzer output
Timer 1 output (PWM0 output)
8bit input/output port
Input/output in bit unit
15V withstand at N-channel open drain output
INT0 input /HOLD release/N-channel Tr. ouptput forwatchdog timer
Reset pin
32.768kHz crystal oscillation terminal XT1
32.768kHz crystal oscillation terminal XT2
Power pin (-)
Input pin for the ceramic resonator oscillation
Output pin for the ceramic resonator oscillation
Power pin (+)
4-bit input port
Input /output in bit unit
INT1 input/HOLD release input
INT2 input/timer 0 event input
Output for VFD display controller segment/timing incommon
Output for VFD dis;lay controller segment/timing withinternal pull-down
resistor in common
Internal pull-down resistor output
Power pin (+)
Output for VFD display controller
High voltage input port PC0 to PC3
Power pin (+) for the VFD output pull-down resist
Output for VFD display controller
High voltage input port PC4 to PC7, PD0 to PD7
Output for VFD displaya controller segment
High voltage input port PE0 to PE7
Power pin (+)
Output for VFD displaya controller segment
High voltage input port PF0 to PF7
Output for VFD displaya controller segment
High voltage I/O port PG0 to PG3
8-bit input/output port. Input for port0 interrupt.
Input/output in nibble unit
Input for HOLD release
15V withstand at N-channel open drain output
Power pin (-)
Power pin (+)
8-bit input/output port. Input for port0 interrupt.
Input/output in nibble unit
Input for HOLD release
15V withstand at N-channel open drain output
SIO0 data output
SIO0 data input/bus input/output
SIO0 clock input/output
SIO1 data output
SIO1 data input/bus input/output
SIO1 clock input/output
8-bit input/output port
Input/output can be specified in a bit unit
3. Pin function