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User’s Manual 231
Lowering the operating voltage will greatly reduce current consumption and power. Drop-
ping to 2.7 V from 3.3 V will result in 70% current consumption and 60% of the power.
Further dropping to 1.8 V will reduce current to 40% and power to 20% compared to 3.3 V.
Naturally this complicates the selection of memories, especially at 1.8 V.
It is important to know that the lowest speed crystal will not always give the lowest power
consumption because when the crystal is divided internally the short chip select option can
be used to reduce the chip select duty cycle of the flash memory or fast RAM, greatly
reducing the static current consumption associated with some memories.
In sleepy mode, power consumption consists of the processor core, the external recom-
mended external tiny logic 32 kHz oscillator, and the memory. The oscillator consumes
17 µA at 3.3 V, and this drops rapidly to about 2 µA at 1.8 V. The processor core con-
sumes between 3 and 50 µA at 3.3 V as the frequency is throttled from 2 kHz to 32 kHz,
and about 40% as much at 1.8 V. If the flash memory specified above is used for memory
and a self-timed 106 ns chip select is used, then the memory will consume 22 µA at
32 MHz and 1.4 µA at 2 kHz.
In addition to these items, a low-power reset controller may consume about 8 µA and
CMOS leakage may consume several µA, increasing with higher temperatures. The graph
below shows current consumption including the tiny logic core, but not including memory
or the reset controller.
Figure 16-11. Sleepy Mode Current Consumption
0
10
20
30
40
50
60
70
80
2.048 4.096 8.192 16.384 32.768
Clock Frequency (kHz)
I (µ
A
)
1.8V
2.2V
2.7V
3.0V
3.3V