Jameco Electronics Rabbit 2000, Руководство пользователя

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User’s Manual 141
The following registers are described in Table 9-14 and in Table 9-15.
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PFDR—Port F data register. Reads value at pins. Writes to port F preload register.
•
PFCR—Parallel Port F control register. This register is used to control the clocking of
the upper and lower nibble of the final output register of the port. On reset, bits 0, 1, 4,
and 5 are reset to zero.
•
PFFR—Port F function register. Set bit to "1" to enable alternate output function. Bits
7-4 enable the PWM outputs and bits 1-0 enable synchronous serial ports C and D
clock outputs for when the serial port is configured for internal clock generation.
•
PFDCR—Parallel Port F drive control register. A "0" makes the corresponding pin a
regular output. A "1" makes the corresponding pin an open-drain output. Write only.
•
PFDDR—Port F data direction register. Set to "1" to make corresponding pin an output.
This register is zeroed on reset.
On reset, the data direction register is zeroed, making all pins inputs. In addition certain bits
in the control register are zeroed (bits 0,1,4,5) to ensure that data is clocked into the output
registers when loaded. All other registers associated with port F are not initialized on reset.
9.6.1 Using Parallel Port A and Parallel Port F
A bug has been discovered in the Rabbit 3000 that results in a conflict between Parallel
Port F and Parallel Port A under certain conditions. This bug has been corrected in ver-
sions of the Rabbit chip designated 3000A and later. See Appendix B for further details.
The bug is rooted in an incomplete address decode for the data output register for Parallel
Port A. This register responds to any of 16 addresses 30 to 3F (hex). When Parallel Port F
was added, the addresses 38 to 3F were used, and the decode for Parallel Port A was not
updated.
There are five registers in Parallel Port F at addresses in the range of 38 to 3F. Writing to
any of these registers will also cause a write to the Parallel Port A output register, which is
identical to the slave port number zero output register. If Parallel Port A is used as in input
register or if the auxiliary I/O bus (which uses the pins of Parallel Port A as a data bus) is
enabled, then the spurious write has no effect on operation because the Parallel Port A out-
put register is not used. However if Parallel Port A is used as an output or is used as the
bidirectional bus of the slave port, then writing to any of the Parallel Port F registers will
cause a spurious write to the Parallel Port A register, which will have a spurious effect on
the operation of the Rabbit 3000 chip.
Table 9-15. Parallel Port F Control Register (adr = 0x03C)
Bits 7, 6 Bits 5, 4 Bits 3, 2 Bits 1, 0
x,x
00—clock upper nibble on pclk/2
01—clock on timer A1
10—clock on timer B1
11—clock on timer B2
x,x
00—clock lower nibble on pclk/2
01—clock on timer A1
10—clock on timer B1
11—clock on timer B2